High-Speed and Low-Power Source-Coupled Field-Effect Transistor-Logic-Type Non-Return-to-Zero Delayed Flip-Flop Circuit Using Resonant Tunneling Diode/High Electron Mobility Transistor Integration Technology

2008 ◽  
Vol 47 (4) ◽  
pp. 2877-2879 ◽  
Author(s):  
Hyungtae Kim ◽  
Seongjin Yeon ◽  
Kwangseok Seo
1996 ◽  
Vol 39 (10) ◽  
pp. 1449-1455 ◽  
Author(s):  
J.C. Yen ◽  
Q. Zhang ◽  
M.J. Mondry ◽  
P.M. Chavarkar ◽  
E.L. Hu ◽  
...  

1991 ◽  
Vol 240 ◽  
Author(s):  
R. M. Kapre ◽  
Li Chen ◽  
K. Kaviani ◽  
Kezhong Hu ◽  
Ping Chen ◽  
...  

We report the the first demonstration of optically bistable switching in monolithic opto-electronic transistor configuration using all III-V components. A strained InGaAs/GaAs asymmetric Fabry-Perot (ASFP) modulator / detector, a strained resonant tunneling diode (RTD), and a GaAs based field-effect-transistor (FET) were used in this demonstration.


2017 ◽  
Vol 05 (02) ◽  
pp. 1750006 ◽  
Author(s):  
R. Islam ◽  
M. M. Uddin ◽  
M. Mofazzal Hossain ◽  
M. A. Matin

The design of a 1[Formula: see text][Formula: see text]m gate length depletion-mode InSb quantum-well field-effect transistor (QWFET) with a 10[Formula: see text]nm-thick Al2O3 gate dielectric has been optimized using a quantum corrected self-consistent Schrödinger-Poisson (QCSP) and two-dimensional drift-diffusion model. The model predicts a very high electron mobility of 4.42[Formula: see text]m2V[Formula: see text]s[Formula: see text] at [Formula: see text][Formula: see text]V, a small pinch off gate voltage ([Formula: see text]) of [Formula: see text]0.25[Formula: see text]V, a maximum extrinsic transconductance ([Formula: see text]) of [Formula: see text][Formula: see text]4.85[Formula: see text]mS/[Formula: see text]m and a drain current density of more than 3.34[Formula: see text]mA/[Formula: see text]m. A short-circuit current-gain cut-off frequency ([Formula: see text]) of 374[Formula: see text]GHz and a maximum oscillation frequency ([Formula: see text]) of 645[Formula: see text]GHz are predicted for the device. These characteristics make the device a potential candidate for low power, high-speed logic electronic device applications.


2003 ◽  
Vol 42 (Part 1, No. 6A) ◽  
pp. 3320-3323
Author(s):  
Tomoyuki Ohshima ◽  
Hironobu Moriguchi ◽  
Shinichi Hoshi ◽  
Masanori Itoh ◽  
Masanori Tsunotani ◽  
...  

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