Thermal Failure Analysis of IGBT Based on Collector Leakage Current

2020 ◽  
Author(s):  
Bo Wang ◽  
Yong Tang
Keyword(s):  
Failure Analysis ◽  
Leakage Current ◽  
Thermal Failure

scholarly journals Leak Current Monitoring System On The Ground Cables Medium Voltage Transformer 150/20 kV

2018 ◽  
Vol 218 ◽  
pp. 01008
Author(s):  
A. Sofwan ◽  
A. Multi ◽  
R. Soleman ◽  
Sugianto ◽  
A.Kusuma Septian
Keyword(s):  
Leakage Current ◽  
Short Circuit ◽  
Electrical Power ◽  
Voltage Transformer ◽  
Power Outage ◽  
Thermal Failure ◽  
Protection Relay ◽  
Medium Voltage ◽  
Current Monitoring ◽  
T Phase

On January, 2017 there had been fault trip at PMT 150/20 kV transformer in Jatirangon substation. For fault detection, that rele differential phase T and REF 20 kV have worked to detect this fault. The resulted impact of this fault is Power outage in feeder a 1350 A, 35 MW and 5 Mvar. The cause of this fault is the occurrence of breakdown on ground cables 20kV T-phase-core 1. This results in a short circuit to the ground so that the differential protection relay and REF 20kV work because the relay detects a fault in the ptotection zone. The result of this research is the design of an early detection monitoring tool. This tool is used to determine the amount of leakage current on the ground cable in order to minimize the occurrence of interference that causes the occurrence of electrical power outage. The result of the leakage current monitor on the ground phase cable T obtained a current of 0.6A with temperature 35 °C. With thermal failure calculation method for leakage current obtained result of 0,56180A with temperature 35 °C. Comparison of the calculation with the measurement of leakage current on the ground cable T phase is obtained at 6.36%.

The Application of Novel Failure Analysis Techniques and Defect Modeling in Eliminating Short Poly End-Cap Problem in Submicron CMOS Devices

1996 ◽  
Author(s):  
Y.E. Hong ◽  
M.T.T. We
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Leakage Current ◽  
Packing Density ◽  
Process Change ◽  
Defect Modeling ◽  
Functional Failure ◽  
Analysis Techniques ◽  
Post Process ◽  
First Time

Abstract As transistor dimension shrinks down below submicron to cater for higher speed and higher packing density, it is very important to characterize the shrinkage carefully to avoid unwanted parametric problems. Leakage current across short poly end-cap is a new failure mechanism that falls in this category and was for the first time, uncovered in submicron multilayered CMOS devices. This mechanism was responsible for a systematic yield problem; identified as the 'centre wafer striping' functional failure problem. This paper presents the advanced failure analysis techniques and defect modeling used to narrow down and identify this new mechanism. Post process change by loosening the marginal poly end-cap criteria eliminated the problem completely.

Case Study—Lock-in Thermography Application in Failure Analysis of a System Level DC-DC μModule Regulator

2017 ◽  
Author(s):  
Vikash Kumar ◽  
Devraj Karthikeyan
Keyword(s):  
Heat Source ◽  
Failure Analysis ◽  
Case Studies ◽  
Fault Localization ◽  
System Level ◽  
Thermal Failure ◽  
Analysis Process ◽  
Lock In

Abstract Fault localization is a common failure analysis process that is used to detect the anomaly on a faulty device. The Infrared Lock-In Thermography (LIT) is one of the localization techniques which can be used on the packaged chips for identifying the heat source which is a result of active damage. This paper extends the idea that the LIT analysis for fault localization is not only limited to the devices within the silicon die but it also highlights thermal failure indications of other components on the PCB (like capacitors, FETs etc on a system level DC-DC μmodule). The case studies presented demonstrate the effectiveness of using LIT in the Failure analysis process of a system level DC-DC μmodule regulator

Failure analysis of leakage current in plastic encapsulated packages

1990 ◽  
Vol 19 (11) ◽  
pp. 1319-1322 ◽  
Author(s):  
S. J. Hu ◽  
F. T. Cheang
Keyword(s):  
Failure Analysis ◽  
Leakage Current

Electrical Failure Analysis and Characterization of Leakage Paths Leading to Single Cell Failures in 128Mbit SDRAMs

2003 ◽  
Author(s):  
M. Versen ◽  
A. Schramm
Keyword(s):  
Failure Analysis ◽  
Single Cell ◽  
Case Studies ◽  
Leakage Current ◽  
Random Access ◽  
Electrical Failure ◽  
Leakage Path ◽  
Short Summary ◽  
Order Of Magnitude

Abstract A common failure signature in dynamic random access memories (DRAMs) is the single cell failure. The charge is lost and thereby the information stored in trench capacitors can be destroyed by high resistive leakage paths. The nature of the leakage path determines the properties of the failure such as temperature-, voltage- and timing-dependencies and its stability. In this study, high resistive leakage paths were investigated and delimited from classical shorts by estimating the order of magnitude of the leakage current and by comparison to a simple resistive leakage path. Such an investigation is the basis for a defect-based test approach that leads to multiparameter tests [1]. An introduction to the problem is given in the first section, while the second section deals with the characterization of the defects in two case studies. A short summary is given in the end.

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