scholarly journals A High-Efficiency Monolithic DC-DC PFM Boost Converter with Parallel Power MOS Technique

VLSI Design ◽  
2013 ◽  
Vol 2013 ◽  
pp. 1-7
Author(s):  
Hou-Ming Chen ◽  
Robert C. Chang ◽  
Kuang-Hao Lin
Keyword(s):  
High Efficiency ◽  
Power Conversion ◽  
Cmos Technology ◽  
Pulse Frequency ◽  
Boost Converter ◽  
Battery Life ◽  
Pulse Frequency Modulation ◽  
Load Range ◽  
Load Current ◽  
The Cost

This paper presents a high-efficiency monolithic dc-dc PFM boost converter designed with a standard TSMC 3.3/5V 0.35 μm CMOS technology. The proposed boost converter combines the parallel power MOS technique with pulse-frequency modulation (PFM) technique to achieve high efficiency over a wide load current range, extending battery life and reducing the cost for the portable systems. The proposed parallel power MOS controller and load current detector exactly determine the size of power MOS to increase power conversion efficiency in different loads. Postlayout simulation results of the designed circuit show that the power conversion is 74.9–90.7% efficiency over a load range from 1 mA to 420 mA with 1.5 V supply. Moreover, the proposed boost converter has a smaller area and lower cost than those of the existing boost converter circuits.

Adaptive On-Time-Controlled PFM Boost Converter with a Below-Threshold Startup Voltage

2018 ◽  
Vol 27 (08) ◽  
pp. 1850120
Author(s):  
Lianxi Liu ◽  
Xufeng Liao ◽  
Wenbin Huang ◽  
Zhangming Zhu ◽  
Yintang Yang
Keyword(s):  
High Efficiency ◽  
Control Method ◽  
Input Voltage ◽  
Pulse Frequency ◽  
Boost Converter ◽  
Cmos Process ◽  
Pulse Frequency Modulation ◽  
Chip Area ◽  
Time Control ◽  
Start Up

A high-efficiency pulse-frequency modulation (PFM) boost DC–DC converter with adaptive on-time (AOT) control method is proposed. A novel three-step startup procedure is proposed and applied on the boost converter, which makes the converter start up with a below-threshold voltage. Besides, adaptive on-time control method can reduce the output ripple dramatically. The proposed integrated boost converter is designed in an SMIC 0.18-[Formula: see text]m standard CMOS process and occupied a chip area of [Formula: see text][Formula: see text]mm2 without any low-[Formula: see text] MOSFETs. In the adopted process, the threshold voltages of PMOS and NMOS are [Formula: see text]0.45[Formula: see text]V and 0.48[Formula: see text]V, respectively. The simulation results show that the proposed converter can start up successfully at the input voltage of 0.25[Formula: see text]V, the output voltage is 1.8[Formula: see text]V with the ripple less than 33[Formula: see text]mV, and the peak efficiency can be up to 94.7%.

scholarly journals High Efficiency Buck-Boost Converter with Three Modes Selection for HV Applications using 0.18 μm Technology

2020 ◽  
Vol 18 (2) ◽  
pp. 137-144
Author(s):  
Fouad Farah ◽  
Mustapha El Alaoui ◽  
Abdelali El Boutahiri ◽  
Mounir Ouremchi ◽  
Karim El Khadiri ◽  
...  
Keyword(s):  
Power Conversion Efficiency ◽  
Conversion Efficiency ◽  
Output Voltage ◽  
High Efficiency ◽  
Power Conversion ◽  
Boost Converter ◽  
Current Control ◽  
Voltage Range ◽  
Operating Modes ◽  
Soft Start

In this paper, we aim to make a detailed study on the evaluation and the characteristics of the non-inverting buck–boost converter. In order to improve the behaviour of the buck-boost converter for the three operating modes, we propose an architecture based on peak current-control. Using a three modes selection circuit and a soft start circuit, this converter is able to expand the power conversion efficiency and reduce inrush current at the feedback loop. The proposed converter is designed to operate with a variable output voltage. In addition, we use LDMOS transistors with low on-resistance, which are adequate for HV applications. The obtained results show that the proposed buck-boost converter perform perfectly compared to others architecture and it is successfully implemented using 0.18 μm CMOS TSMC technology, with an output voltage regulated to 12V and input voltage range of 4-20 V. The power conversion efficiency for the three operating modes buck, boost and buck-boost are 97.6%, 96.3% and 95.5% respectively at load current of 4A.

scholarly journals Design Methodology of Tightly Regulated Dual-Output LLC Resonant Converter Using PFM-APWM Hybrid Control Method

Energies ◽  
2019 ◽  
Vol 12 (11) ◽  
pp. 2146
Author(s):  
HwaPyeong Park ◽  
Mina Kim ◽  
HakSun Kim ◽  
JeeHoon Jung
Keyword(s):  
Design Methodology ◽  
Control Method ◽  
Hybrid Control ◽  
Pulse Frequency ◽  
Voltage Regulation ◽  
Resonant Converter ◽  
Pulse Frequency Modulation ◽  
Load Range ◽  
Worst Case ◽  
Llc Resonant Converter

A dual-output LLC resonant converter using pulse frequency modulation (PFM) and asymmetrical pulse width modulation (APWM) can achieve tight output voltage regulation, high power density, and high cost-effectiveness. However, an improper resonant tank design cannot achieve tight cross regulation of the dual-output channels at the worst-case load conditions. In addition, proper magnetizing inductance is required to achieve zero voltage switching (ZVS) of the power MOSFETs in the LLC resonant converter. In this paper, voltage gain of modulation methods and steady state operations are analyzed to implement the hybrid control method. In addition, the operation of the hybrid control algorithm is analyzed to achieve tight cross regulation performance. From this analysis, the design methodology of the resonant tank and the magnetizing inductance are proposed to compensate the output error of both outputs and to achieve ZVS over the entire load range. The cross regulation performance is verified with simulation and experimental results using a 190 W prototype converter.

scholarly journals Analysis and Design of High-Efficiency Bidirectional GaN-Based CLLC Resonant Converter

Energies ◽  
2019 ◽  
Vol 12 (20) ◽  
pp. 3859
Author(s):  
Yuanjun Liu ◽  
Guiping Du ◽  
Xueyi Wang ◽  
Yanxiong Lei
Keyword(s):  
Design Methodology ◽  
High Efficiency ◽  
Pulse Frequency ◽  
Resonant Converter ◽  
Pulse Frequency Modulation ◽  
Zero Voltage Switching ◽  
Analysis And Design ◽  
Reverse Mode ◽  
Parasitic Parameters ◽  
Zero Voltage

A bidirectional CLLC resonant converter (CLLC-BRC) based on GaN transistors is analyzed and designed in this paper. Similar resonant topologies are listed and commented on, with the CLLC topology showing competitiveness in bidirectional energy transmission. The analysis of the aforementioned converter has been provided, including the reveal of resonant frequencies of the CLLC topology and an improved zero-voltage switching (ZVS) condition with operation principles of the reverse mode and relevant parasitic parameters taken into account. The design methodology of the aforementioned converter based on pulse frequency modulation (PFM) is further discussed in detail. A prototype with a rated power of 400 W and a maximal operating frequency that is larger than 0.5 MHz was built to verify the proposed design methodology. The highest conversion efficiency of the prototype was 97.02% in the forward mode, and it was 95.96% in the reverse mode.

Sign in / Sign up

Export Citation Format

Share Document