Adaptive On-Time-Controlled PFM Boost Converter with a Below-Threshold Startup Voltage

2018 ◽  
Vol 27 (08) ◽  
pp. 1850120
Author(s):  
Lianxi Liu ◽  
Xufeng Liao ◽  
Wenbin Huang ◽  
Zhangming Zhu ◽  
Yintang Yang
Keyword(s):  
High Efficiency ◽  
Control Method ◽  
Input Voltage ◽  
Pulse Frequency ◽  
Boost Converter ◽  
Cmos Process ◽  
Pulse Frequency Modulation ◽  
Chip Area ◽  
Time Control ◽  
Start Up

A high-efficiency pulse-frequency modulation (PFM) boost DC–DC converter with adaptive on-time (AOT) control method is proposed. A novel three-step startup procedure is proposed and applied on the boost converter, which makes the converter start up with a below-threshold voltage. Besides, adaptive on-time control method can reduce the output ripple dramatically. The proposed integrated boost converter is designed in an SMIC 0.18-[Formula: see text]m standard CMOS process and occupied a chip area of [Formula: see text][Formula: see text]mm2 without any low-[Formula: see text] MOSFETs. In the adopted process, the threshold voltages of PMOS and NMOS are [Formula: see text]0.45[Formula: see text]V and 0.48[Formula: see text]V, respectively. The simulation results show that the proposed converter can start up successfully at the input voltage of 0.25[Formula: see text]V, the output voltage is 1.8[Formula: see text]V with the ripple less than 33[Formula: see text]mV, and the peak efficiency can be up to 94.7%.

A Near-Threshold Voltage Startup Monolithic Boost Converter with Adaptive Sleeping Time Control

2016 ◽  
Vol 26 (04) ◽  
pp. 1750063 ◽  
Author(s):  
Lianxi Liu ◽  
Yiyang Zhou ◽  
Junchao Mu ◽  
Xufeng Liao ◽  
Zhangming Zhu ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Input Voltage ◽  
Boost Converter ◽  
Switching Frequency ◽  
Cmos Process ◽  
Sleeping Time ◽  
Time Control ◽  
Soft Start ◽  
Light Load ◽  
Near Threshold

A novel near-threshold voltage startup monolithic boost converter is presented in this paper using an adaptive sleeping time control (ASTC) scheme for low-power applications. The proposed ASTC scheme can promote the power efficiency of the current-mode boost converter under light load by automatically adjusting the sleep time of the converter, and the converter's quiescent current drops down to 4[Formula: see text][Formula: see text]A during the sleeping period. In addition, a new soft-start method is introduced to make the boost converter start up with a near-threshold input voltage. The proposed boost converter was fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS process and occupies a small chip area of 0.50[Formula: see text][Formula: see text][Formula: see text]mm. Experimental results show that the boost converter achieves the minimum 0.5-V startup voltage when the output voltage is set to 1.8[Formula: see text]V. After startup, the input voltage range can be expanded from 0.3[Formula: see text]V to 1.5[Formula: see text]V with a switching frequency of 1[Formula: see text]MHz. In addition, a peak efficiency of 94% and a minimum efficiency of 81% are measured at the 1.5-V input voltage as the load current ranges from 0.1[Formula: see text]mA to 100[Formula: see text]mA.

scholarly journals A High-Efficiency Monolithic DC-DC PFM Boost Converter with Parallel Power MOS Technique

VLSI Design ◽  
2013 ◽  
Vol 2013 ◽  
pp. 1-7
Author(s):  
Hou-Ming Chen ◽  
Robert C. Chang ◽  
Kuang-Hao Lin
Keyword(s):  
High Efficiency ◽  
Power Conversion ◽  
Cmos Technology ◽  
Pulse Frequency ◽  
Boost Converter ◽  
Battery Life ◽  
Pulse Frequency Modulation ◽  
Load Range ◽  
Load Current ◽  
The Cost

This paper presents a high-efficiency monolithic dc-dc PFM boost converter designed with a standard TSMC 3.3/5V 0.35 μm CMOS technology. The proposed boost converter combines the parallel power MOS technique with pulse-frequency modulation (PFM) technique to achieve high efficiency over a wide load current range, extending battery life and reducing the cost for the portable systems. The proposed parallel power MOS controller and load current detector exactly determine the size of power MOS to increase power conversion efficiency in different loads. Postlayout simulation results of the designed circuit show that the power conversion is 74.9–90.7% efficiency over a load range from 1 mA to 420 mA with 1.5 V supply. Moreover, the proposed boost converter has a smaller area and lower cost than those of the existing boost converter circuits.

Selectable Output Voltage High Efficiency Boost Converter

2018 ◽  
Vol 27 (11) ◽  
pp. 1850178 ◽  
Author(s):  
Li-Ye Cheng ◽  
Chen Sun ◽  
Zhen-Wei Zhou
Keyword(s):  
High Efficiency ◽  
Input Voltage ◽  
Boost Converter ◽  
Oxide Semiconductor ◽  
Constant Current ◽  
Portable Devices ◽  
Cmos Process ◽  
Transient Time ◽  
Heavy Load ◽  
Light Load

The paper proposed a high efficiency boost converter with constant voltage (CV) and constant current (CC) modes. The selection of CV or CC working mode is based on the requirement, and the transient time from CV to CC mode is 230[Formula: see text][Formula: see text]s. The boost converter is particularly for the use of Li-ion battery portable devices. High efficiency is obtained by sleep/burst mode under light load and pulse width modulation (PWM) mode under heavy load. The quiescent current of the whole chip can be down to 6[Formula: see text][Formula: see text]A when the converter enters the standby mode. The converter has been made of 0.35[Formula: see text][Formula: see text]m complementary metal-oxide semiconductor (CMOS) process. Experimental results show that the peak efficiency is 98.2% at a 1.5[Formula: see text]A output current and a 4.2[Formula: see text]V input voltage.

scholarly journals High gain boost converter with modified voltage multiplier for stand alone PV system

2019 ◽  
Vol 14 (1) ◽  
pp. 185
Author(s):  
Getzial Anbu Mani ◽  
A. K. Parvathy
Keyword(s):  
High Efficiency ◽  
Input Voltage ◽  
High Gain ◽  
Boost Converter ◽  
Pv System ◽  
Boost Converters ◽  
Low Input ◽  
Voltage Multiplier ◽  
Photo Voltaic ◽  
Current Ripple

<p>Boost converters of high gain are used for photo voltaic systems to obtain high efficiency. These high gain Boost converters gives increased output voltage for a low input produces high outputs for low input voltage. The High gain boost converters have the following merits. Conduction losses input current ripple and stress across the switches is reduced while the efficiency is increases. The high gain of the converters with the above said merits is obtained by changing the duty cycle of switches accordingly .In this paper a boost converter working with interleaved concept along with a additional Nstage voltage Multiplier has been carried out by simulation using MATLAB/ simulink and the mathematical modeling of various parameters is also done.</p>

scholarly journals Design Methodology of Tightly Regulated Dual-Output LLC Resonant Converter Using PFM-APWM Hybrid Control Method

Energies ◽  
2019 ◽  
Vol 12 (11) ◽  
pp. 2146
Author(s):  
HwaPyeong Park ◽  
Mina Kim ◽  
HakSun Kim ◽  
JeeHoon Jung
Keyword(s):  
Design Methodology ◽  
Control Method ◽  
Hybrid Control ◽  
Pulse Frequency ◽  
Voltage Regulation ◽  
Resonant Converter ◽  
Pulse Frequency Modulation ◽  
Load Range ◽  
Worst Case ◽  
Llc Resonant Converter

A dual-output LLC resonant converter using pulse frequency modulation (PFM) and asymmetrical pulse width modulation (APWM) can achieve tight output voltage regulation, high power density, and high cost-effectiveness. However, an improper resonant tank design cannot achieve tight cross regulation of the dual-output channels at the worst-case load conditions. In addition, proper magnetizing inductance is required to achieve zero voltage switching (ZVS) of the power MOSFETs in the LLC resonant converter. In this paper, voltage gain of modulation methods and steady state operations are analyzed to implement the hybrid control method. In addition, the operation of the hybrid control algorithm is analyzed to achieve tight cross regulation performance. From this analysis, the design methodology of the resonant tank and the magnetizing inductance are proposed to compensate the output error of both outputs and to achieve ZVS over the entire load range. The cross regulation performance is verified with simulation and experimental results using a 190 W prototype converter.

A Stable Mode-Selectable Oscillator with Variable Duty Cycle and High-Efficiency

2015 ◽  
Vol 24 (09) ◽  
pp. 1550132 ◽  
Author(s):  
Li-Ye Cheng ◽  
Xin-Quan Lai
Keyword(s):  
Duty Cycle ◽  
High Efficiency ◽  
Dynamic Performance ◽  
Operation Mode ◽  
Charge Pump ◽  
Input Voltage ◽  
Cmos Process ◽  
Pump Efficiency ◽  
Stable Mode ◽  
Wide Range

A mode-selectable oscillator (OSC) with variable duty cycle for improved charge pump efficiency is proposed in this paper. The novel OSC adjusts its duty cycle according to the operation mode of the charge pump, thus improves the charge-pump efficiency and dynamic performance. The control of variable duty cycle is implemented in digital logic hence it provides robust noise immunity and instantaneous response. The OSC and the charge-pump have been implemented in a 0.6-μm 40-V CMOS process. Experimental results show that the peak efficiency is 92.7% at 200-mA load, the recovery time is less than 25 μs and load transient is 15 mV under 500-mA load variation. The system is able to work under a wide range of input voltage (V IN ) in all modes with low EMI.

scholarly journals Improved Modulated Carrier Controlled PFC Boost Converter Using Charge Current Sensing Method

Energies ◽  
2018 ◽  
Vol 11 (4) ◽  
pp. 717 ◽  
Author(s):  
Jintae Kim ◽  
Chung-Yuen Won
Keyword(s):  
Control Method ◽  
Harmonic Distortion ◽  
Control Unit ◽  
Input Voltage ◽  
Boost Converter ◽  
Current Sensing ◽  
Voltage Range ◽  
Zero Current ◽  
Voltage Amplifier ◽  
Current Duration

An improved modulated carrier control (MCC) method is proposed to offer high power factor (PF) and low total harmonic distortion (THD) at a wide input voltage range and load variation. The conventional MCC method not only requires a multiplier and divider, but also is hard to be implemented with a micro controller unit without a high frequency oscillator. To overcome the problem and maintain the advantages of the conventional MCC method, the proposed MCC method adopts a current integrator, an output voltage amplifier, a zero-current duration (ZCD) demodulator of the boost inductor, and a carrier generator. Thus, it can remove a multiplier and well, as it allows for being operable with a general micro control unit. This paper presents an operation principle of the proposed control method. To verify the proposed control method, experimental results with 400 W PFC boost converter is demonstrated.

PWM/PFM Dual-Mode Synchronous Boost DC-DC Regulator

2013 ◽  
Vol 380-384 ◽  
pp. 3209-3212
Author(s):  
Wen Yuan Li ◽  
Jun Zhang
Keyword(s):  
Pulse Width Modulation ◽  
Pulse Frequency ◽  
Dual Mode ◽  
Pulse Frequency Modulation ◽  
Good Efficiency ◽  
Signal Regeneration ◽  
Soft Start ◽  
Start Up ◽  
Simulation Results ◽  
Surge Current

a novel peak current PWM/PFM dual-mode boost dc-dc regulator applying for neural signal regeneration is proposed in this paper. The converter can adaptively switch between pulse-width modulation (PWM) and pulse-frequency modulation (PFM) both with relatively high conversion efficiency. Soft-start circuit is designed to eliminate the surge current at the start up stage of the regulator, other protection modules are also contained. The paper analyzes the model and stability of the system. The operation frequency of the regulator is 1MHz. The simulation results show the efficiency of the system is relatively high in PWM mode, up to 95%, in PFM mode it also has good efficiency.

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