scholarly journals Efficient Parallel Implementation of Matrix Multiplication for Lattice-Based Cryptography on Modern ARM Processor

2018 ◽  
Vol 2018 ◽  
pp. 1-10 ◽  
Author(s):  
Taehwan Park ◽  
Hwajeong Seo ◽  
Junsub Kim ◽  
Haeryong Park ◽  
Howon Kim

Recently, various types of postquantum cryptography algorithms have been proposed for the National Institute of Standards and Technology’s Postquantum Cryptography Standardization competition. Lattice-based cryptography, which is based on Learning with Errors, is based on matrix multiplication. A large-size matrix multiplication requires a long execution time for key generation, encryption, and decryption. In this paper, we propose an efficient parallel implementation of matrix multiplication and vector addition with matrix transpose using ARM NEON instructions on ARM Cortex-A platforms. The proposed method achieves performance enhancements of 36.93%, 6.95%, 32.92%, and 7.66%. The optimized method is applied to the Lizard. CCA key generation step enhances the performance by 7.04%, 3.66%, 7.57%, and 9.32% over previous state-of-the-art implementations.

Author(s):  
Chandrakala B M ◽  
S C Lingareddy

<p>In recent days, data sharing has provided the flexibility to share the data, store the data, and perform operation on data virtually as well as cost effectively. Data sharing in cloud is one of the feature, which is being popular and widely accepted. However, the concern here is to ensure the data security and this has led the researcher to research in this area. To provide the security several Proxy re-encryption scheme has been introduced, however all these method lacks of efficiency. Hence In this paper, we propose a scheme known as ALBC (Adaptive Lattice Based Cryptography), this scheme follows the two phase i.e. encryption and Re-encryption. Encryption phase has few algorithms such as Key_Gen, Enc, Dec. Similarly ALBC Re-Enc has five algorithm i.e. Key_Gen, Key_ReGen,  Enc, Re-Enc, Dec. our algorithm not only provides the security but also solves the problem of RL(Ring-learning) with errors problems. In order to evaluate, our algorithm is compared with the existing model in terms of encryption time, decryption time, re-encryption time, key generation  and key regeneration by varying the various key size. When we observe the comparative analysis, it is observed that our algorithm outperforms the existing algorithm.</p>


Author(s):  
James Howe ◽  
Marco Martinoli ◽  
Elisabeth Oswald ◽  
Francesco Regazzoni

AbstractFrodoKEM is a lattice-based key encapsulation mechanism, currently a semi-finalist in NIST’s post-quantum standardisation effort. A condition for these candidates is to use NIST standards for sources of randomness (i.e. seed-expanding), and as such most candidates utilise SHAKE, an XOF defined in the SHA-3 standard. However, for many of the candidates, this module is a significant implementation bottleneck. Trivium is a lightweight, ISO standard stream cipher which performs well in hardware and has been used in previous hardware designs for lattice-based cryptography. This research proposes optimised designs for FrodoKEM, concentrating on high throughput by parallelising the matrix multiplication operations within the cryptographic scheme. This process is eased by the use of Trivium due to its higher throughput and lower area consumption. The parallelisations proposed also complement the addition of first-order masking to the decapsulation module. Overall, we significantly increase the throughput of FrodoKEM; for encapsulation we see a $$16\times $$ 16 × speed-up, achieving 825 operations per second, and for decapsulation we see a $$14\times $$ 14 × speed-up, achieving 763 operations per second, compared to the previous state of the art, whilst also maintaining a similar FPGA area footprint of less than 2000 slices.


2019 ◽  
Vol 8 (1) ◽  
pp. 2
Author(s):  
Mehdi Lotfi ◽  
Hossein Kheiri ◽  
Azizeh Jabbari

Introduction:  In this paper, an encryption algorithm for the security of medical images is presented, which has extraordinary security. Given that the confidentiality of patient data is one of the priorities of medical informatics, the algorithm can be used to store and send medical image.Material and Methods:  In this paper, the solutions of chaotic differential equations are used to generate encryption keys. This method is more than other methods used in encoding medical images, resistant to statistics attacks, low encryption and decryption time and very high key space. In the proposed algorithm, unlike other methods that use random key generation, this method uses the production of solutions of the chaotic differential equations in a given time period for generating a key. All simulations and coding are done in MATLAB software.Results:   Chaotic Differential Equations have two very important features that make it possible to encode medical images. One is the unpredictability of the system's behavior and the other is a severe sensitivity to the initial condition.Conclusion: These two features make the method resistant to possible attacks to decode the concept of synchronization chaotic systems. Using the results of the method, medical information can be made safer than existing ones.


2020 ◽  
Vol 8 (2) ◽  
pp. 113-120
Author(s):  
Aminudin Aminudin ◽  
Gadhing Putra Aditya ◽  
Sofyan Arifianto

This study aims to analyze the performance and security of the RSA algorithm in combination with the key generation method of enhanced and secured RSA key generation scheme (ESRKGS). ESRKGS is an improvement of the RSA improvisation by adding four prime numbers in the property embedded in key generation. This method was applied to instant messaging using TCP sockets. The ESRKGS+RSA algorithm was designed using standard RSA development by modified the private and public key pairs. Thus, the modification was expected to make it more challenging to factorize a large number n into prime numbers. The ESRKGS+RSA method required 10.437 ms faster than the improvised RSA that uses the same four prime numbers in conducting key generation processes at 1024-bit prime number. It also applies to the encryption and decryption process. In the security testing using Fermat Factorization on a 32-bit key, no prime number factor was found. The test was processed for 15 hours until the test computer resource runs out.


2022 ◽  
Author(s):  
Avinash N. ◽  
Jaraldpushparaj S. ◽  
Sathinathan T. ◽  
Britto Antony Xavier G.

Author(s):  
Reni Rahmadani ◽  
Harvei Desmon Hutahaean ◽  
Ressy Dwitias Sari

A lot of data is misused without the data owner being aware of it. Software developers must ensure the security user data on their system. Due to the size of the market that houses data, the security of record databases must be of great concern. Cryptographic systems or data encryption can be used for data security. The Merkle-Hellman Knapsack algorithm is included in public-key cryptography because it uses different keys for the encryption and decryption processes. This algorithm belongs to the NP-complete algorithm which cannot be solved in polynomial order time. This algorithm has stages of key generation, encryption, and decryption. The results of this study secure database records from theft by storing records in the form of ciphertext/password. Ciphertext generated by algorithmic encryption has a larger size than plaintext.


Author(s):  
P. Gayathri ◽  
Syed Umar ◽  
G. Sridevi ◽  
N. Bashwanth ◽  
Royyuru Srikanth

As more increase in usage of communications and developing them more user friendly. While developing those communications, we need to take care of security and safety of user’s data. Many researchers have developed many complex algorithms to maintain security in user’s application. Among those one of the best algorithms are cryptography based, in which user will be safe side mostly from the attackers.  We already had some AES algorithm which uses very complex cryptographic algorithm to increase the performance and more usage of lookup tables. So the cache timing attackers will correlates the details to encrypt the data under known key with the unknown key. So, for this we provide an improvised solution. This paper deals with an extension of public-key encryption and decryption support including a private key. The private key is generated with the combination of AES and ECC. In general AES, key length is 128 bits with 10 times of iterations. But with this, users won’t get efficient security for their operations, so to increase the security level we are implementing 196-bit based encryption with 12 times round-key generation iterations. By this enhancement, we can assure to users to high level security and can keep users data in confidential way.


Cryptography ◽  
2018 ◽  
Vol 2 (3) ◽  
pp. 22 ◽  
Author(s):  
Yunxi Guo ◽  
Timothy Dee ◽  
Akhilesh Tyagi

Physical Unclonable Functions (PUFs) are designed to extract physical randomness from the underlying silicon. This randomness depends on the manufacturing process. It differs for each device. This enables chip-level authentication and key generation applications. We present an encryption protocol using PUFs as primary encryption/decryption functions. Each party has a PUF used for encryption and decryption. This PUF is constrained to be invertible and commutative. The focus of the paper is an evaluation of an invertible and commutative PUF based on a primitive shifting permutation network—a barrel shifter. Barrel shifter (BS) PUF captures the delay of different shift paths. This delay is entangled with message bits before they are sent across an insecure channel. BS-PUF is implemented using transmission gates for physical commutativity. Post-layout simulations of a common centroid layout 8-level barrel shifter in 0.13 μ m technology assess uniqueness, stability, randomness and commutativity properties. BS-PUFs pass all selected NIST statistical randomness tests. Stability similar to Ring Oscillator (RO) PUFs under environmental variation is shown. Logistic regression of 100,000 plaintext–ciphertext pairs (PCPs) fails to successfully model BS-PUF behavior.


Electronics ◽  
2019 ◽  
Vol 8 (4) ◽  
pp. 413 ◽  
Author(s):  
Tuy Nguyen Tan ◽  
Hanho Lee

This paper presents a novel architecture for ring learning with errors (LWE) cryptoprocessors using an efficient approach in encryption and decryption operations. By scheduling multipliers to work in parallel, the encryption and decryption time are significantly reduced. In addition, polynomial multiplications are conducted using radix-2 and radix-8 multiple delay feedback (MDF) architecture-based number theoretic transform (NTT) multipliers to speed up the multiplication operation. To reduce the hardware complexity of an NTT multiplier, three bit-reverse operations during the NTT and inverse NTT (INTT) processes are removed. Polynomial additions in the ring-LWE encryption phase are also arranged to work simultaneously to reduce the latency. As a result, the proposed efficient-scheduling parallel multiplier-based ring-LWE cryptoprocessors can achieve higher throughput and efficiency compared with existing architectures. The proposed ring-LWE cryptoprocessors are synthesized and verified using Xilinx VIVADO on a Virtex-7 field programmable gate array (FPGA) board. With security parameters n = 512 and q = 12,289, the proposed cryptoprocessors using radix-2 single-path delay feedback (SDF), radix-2 MDF, and radix-8 MDF multipliers perform encryption in 4.58 μ s, 1.97 μ s, and 0.89 μ s, and decryption in 4.35 μ s, 1.82 μ s, and 0.71 μ s, respectively. A comparison of the obtained throughput and efficiency with those of previous studies proves that the proposed cryptoprocessors achieve a better performance.


2018 ◽  
Vol 1 (1) ◽  
pp. 6
Author(s):  
Rehan Shams ◽  
Fozia Hanif Khan ◽  
Umair Jillani ◽  
M. Umair

A new structure to develop 64-bit RSA encryption engine on FPGA is being presented in this paper that can be used as a standard device in the secured communication system. The RSA algorithm has three parts i.e. key generation, encryption and decryption. This procedure also requires random generation of prime numbers, therefore, we are proposing an efficient fast Primality testing algorithm to meet the requirement for generating the key in RSA algorithm. We use right-to-left-binary method for the exponent calculation. This reduces the number of cycles enhancing the performance of the system and reducing the area usage of the FPGA. These blocks are coded in Verilog and are synthesized and simulated in Xilinx 13.2 design suit.


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