scholarly journals New Realization of Quadrature Oscillator using OTRA

2017 ◽  
Vol 7 (4) ◽  
pp. 1815 ◽  
Author(s):  
Gurumurthy Komanaplli ◽  
Neeta Pandey ◽  
Rajeshwari Pandey
Keyword(s):  
High Frequency ◽  
Closed Loop ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Third Order ◽  
Pass Filter ◽  
Fully Integrated ◽  
Quadrature Oscillator ◽  
Electronically Tunable ◽  
High Pass

In this paper a new, operational transresistance amplifier (OTRA) based, third order quadrature oscillator (QO) is presented. The proposed structure forms a closed loop using a high pass filter and differentiator. All the resistors employed in the circuit can be implemented using matched transistors operating in linear region thereby making the proposed structure fully integrated and electronically tunable. The effect of non-idealities of OTRA has been analyzed which suggests that for high frequency applications self-compensation can be used. Workability of the proposed QO is verified through SPICE simulations using 0.18μm AGILENT CMOS process parameters. Total harmonic distortion (THD) for the proposed QO is found to be less than 2.5%.The sensitivity, phasenoise analysis is also discussed for the proposed structure.

scholarly journals OTRA Based Voltage Mode Third Order Quadrature Oscillator

2014 ◽  
Vol 2014 ◽  
pp. 1-5 ◽  
Author(s):  
Rajeshwari Pandey ◽  
Neeta Pandey ◽  
Gurumurthy Komanapalli ◽  
Rashika Anurag
Keyword(s):  
Process Parameters ◽  
High Frequency ◽  
Oscillation Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Third Order ◽  
Linear Region ◽  
Fully Integrated ◽  
Electronic Tuning ◽  
Quadrature Oscillators

Two topologies of operational transresistance (OTRA) based third order quadrature oscillators (QO) are proposed in this paper. The proposed oscillators are designed using a combination of lossy and lossless integrators. The proposed topologies can be made fully integrated by implementing the resistors using matched transistors operating in linear region, which also facilitates electronic tuning of oscillation frequency. The nonideality analysis of the circuit is also given and for high frequency applications self-compensation can be used. Workability of the proposed QOs is verified through PSPICE simulations using 0.5 μm AGILENT CMOS process parameters. The total harmonic distortion (THD) for both the QO designs is found to be less than 1%.

scholarly journals Electronically Tunable Third Order Feed Forward CM Band Pass Filter for Q = 10

2021 ◽  
Vol 04 (10) ◽  
Author(s):  
Dr. D. D. Mulajkar ◽  
Keyword(s):  
Integrated Circuit ◽  
High Frequency ◽  
Current Mode ◽  
Band Pass Filter ◽  
Third Order ◽  
Pass Filter ◽  
Op Amp ◽  
Current Input ◽  
Band Pass ◽  
Electronically Tunable

A new electronically tunable current-mode third order filter is proposed in this paper. OP-AMP is used as an active building block. With current input the filter can realize band pass responses in current mode. The filter circuit realizes calculated transfer function. The other attractive features of the filter are a) Employment of minimum active and passive elements b) Responses are electronically tunable c) Low active and passive sensitivities d) Suitable for high frequency operation e) Ideal for integrated circuit implementation.

Electronically Tunable Current-Mode Third-Order Square-Root-Domain Filter Design

2018 ◽  
Vol 27 (09) ◽  
pp. 1850136
Author(s):  
Ali Kircay ◽  
M. Serhat Keserlioglu ◽  
F. Zuhal Adalar
Keyword(s):  
Filter Design ◽  
Current Mode ◽  
Cmos Process ◽  
Square Root ◽  
Third Order ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Level 3 ◽  
Electronically Tunable

In this study, electronically-tunable, current-mode, square-root-domain, third-order low-pass filter is proposed. The study is carried out with three circuit designs. First circuit is third-order low-pass Butterworth filter, second circuit is third-order low-pass Chebyshev filter and the last circuit is third-order low-pass elliptic filter. All the input and output values of the filter circuit are current. Only grounded capacitors and MOSFETs are required in order to realize the filter circuit. Additionally, natural frequency [Formula: see text] of the current-mode filter can be adjusted electronically using outer current sources. To validate the theory and to demonstrate the performance of third-order filter, frequency and time domain simulations of PSPICE program are used. To that end, TSMC 0.35[Formula: see text][Formula: see text]m Level 3 CMOS process parameters are utilized to realize the simulations of the filter.

scholarly journals Wideband Reconfigurable Integrated Low-Pass Filter for 5G Compatible Software Defined Radio Solutions

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 734
Author(s):  
Karolis Kiela ◽  
Marijan Jurgo ◽  
Vytautas Macaitis ◽  
Romualdas Navickas
Keyword(s):  
Software Defined Radio ◽  
Dynamic Range ◽  
Noise Figure ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Filter Performance ◽  
Low Pass ◽  
Bandwidth Tuning

This article presents a wideband reconfigurable integrated low-pass filter (LPF) for 5G NR compatible software-defined radio (SDR) solutions. The filter uses Active-RC topology to achieve high linearity performance. Its bandwidth can be tuned from 2.5 MHz to 200 MHz, which corresponds to a tuning ratio of 92.8. The order of the filter can be changed between the 2nd, 4th, or 6th order; it has built-in process, voltage, and temperature (PVT) compensation with a tuning range of ±42%; and power management features for optimization of the filter performance across its entire range of bandwidth tuning. Across its entire order, bandwidth, and power configuration range, the filter achieves in-band input-referred third-order intercept point (IIP3) between 32.7 dBm and 45.8 dBm, spurious free dynamic range (SFDR) between 63.6 dB and 79.5 dB, 1 dB compression point (P1dB) between 9.9 dBm and 14.1 dBm, total harmonic distortion (THD) between −85.6 dB and −64.5 dB, noise figure (NF) between 25.9 dB and 31.8 dB and power dissipation between 1.19 mW and 73.4 mW. The LPF was designed and verified using 65 nm CMOS process; it occupies a 0.429 mm2 area of silicon and uses a 1.2 V supply.

Design of Triggering Device for VFTO Measurement System

2012 ◽  
Vol 516-517 ◽  
pp. 1759-1764
Author(s):  
Gong Chang Yue ◽  
Yu Rong Jia ◽  
Jia Xi He ◽  
Wei Dong Liu
Keyword(s):  
Measurement System ◽  
High Frequency ◽  
Measuring Process ◽  
Pass Filter ◽  
High Pass Filter ◽  
Power Frequency ◽  
Gas Insulated Substation ◽  
Disconnect Switch ◽  
Transient Overvoltage ◽  
High Pass

Very fast transient overvoltage (VFTO) can be generated during the operation of disconnect switch (DS). Especially in ultra high voltage (UHV) gas insulated substation (GIS), VFTO is a threat to the safety of the power system equipment. It is very important to measure VFTO waveforms accurately. VFTO waveforms are comprised of high frequency voltage superimposed on the power frequency voltage in source side of DS and high frequency voltage superimposed on step-wise voltage in load side. How to trigger oscilloscope to acquire data is a big problem in measuring process. According to the features of VFTO waveforms, new triggering device consisting of a high pass filter is designed. The output of measurement sensor is used as the input of the high pass filter, and the output of the high pass filter is used to trigger oscilloscope. When the DS is not operated, there are no signals output from the high pass filter and the oscilloscope is waiting for trigger. After the operation of DS, the high frequency signals will pass the filter to trigger oscilloscope to acquire data. The device can guarantee the oscilloscope to complete a data acquisition properly.

CMOS Implementation of Current Differencing Operational Amplifier and Its Notch Filter Application

2019 ◽  
Vol 29 (08) ◽  
pp. 2050132
Author(s):  
Muhammed Emin Başak
Keyword(s):  
Operational Amplifier ◽  
Process Model ◽  
Active Element ◽  
Harmonic Distortion ◽  
Notch Filter ◽  
Current Mode ◽  
Monte Carlo Analysis ◽  
Cmos Process ◽  
Band Pass Filter ◽  
Pass Filter

Active elements are fundamental circuits for a wide scope of scientific and industrial processes. Many researchers have examined active devices to implement filters, oscillators, rectifiers, and converters. This paper presents the current differencing operational amplifier (CDOA) as an active element, firstly implemented with CMOS transistors. The input part of this circuit is a current differencing unit and the conventional operational amplifier (Op-Amp) pursues it. A new realization of a notch filter consists of CDOA is suggested. Voltage-mode band-pass filter and current-mode notch filter are presented as a different filter applications. Simulation results using TSMC 0.18-[Formula: see text]m CMOS process model are used to verify the theoretical analyses. The sensitivity, noise, total harmonic distortion (THD) and the Monte Carlo analysis have been performed to demonstrate the effectiveness of the proposed active element and notch filter.

The Design of Gm-C Low-Pass Filter for Micromachined Gyroscope

2014 ◽  
Vol 609-610 ◽  
pp. 1072-1076
Author(s):  
Qiu Ye Lv ◽  
Chong He ◽  
Wen Jie Fan ◽  
Yu Feng Zhang ◽  
Xiao Wei Liu
Keyword(s):  
Process Model ◽  
Stop Band ◽  
Cutoff Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Simulation Results ◽  
Micromachined Gyroscope

In this Paper, a 4th-Order Low-Pass Gm-C Filter is Presented. for the Design of Operational Tranconductance Amplifier(OTA), it Adopts the Techniques of Current Division and Current Cancellation. these Techniques can Help to Achieve a Low Transconductance Value. for the Architecture of the 4th-Order Gm-C Filter, it Consists of Two Biquads. the Two Biquads are Cascade Connected. the Gm-C Low-Pass Filter has been Implemented under 0.5 μm CMOS Process Model. the Final Simulation Results Show the Cutoff Frequency of the Filter is 100Hz and the Stop-Band Attenuation is Larger than 60dB. the Power Consumption is Lower than 1mW and the Total Harmonic Distortion(THD) is -55dB.

A New Method for Evaluation of Cavitation Near Mechanical Heart Valves

2003 ◽  
Vol 125 (5) ◽  
pp. 663-670 ◽  
Author(s):  
Peter Johansen ◽  
Keefe B. Manning ◽  
John M. Tarbell ◽  
Arnold A. Fontaine ◽  
Steven Deutsch ◽  
...  
Keyword(s):  
High Frequency ◽  
Heart Valves ◽  
A Priori ◽  
Pressure Fluctuations ◽  
Mechanical Heart Valves ◽  
New Method ◽  
Pass Filter ◽  
Bandwidth Limitation ◽  
High Pass

Evaluation of cavitation in vivo is often based on recordings of high-pass filtered random high-frequency pressure fluctuations. We hypothesized that cavitation signal components are more appropriately assessed by a new method for extraction of random signal components of the pressure signals. We investigated three different valve types and found a high correlation between the two methods r2:0.8806−0.9887. The new method showed that the cavitation signal could be extracted without a priori knowledge needed for setting the high-pass filter cut off frequency, nor did it introduce bandwidth limitation of the cavitation signal.

scholarly journals A Fully Integrated 64-Channel Recording System for Extracellular Raw Neural Signals

Electronics ◽  
2021 ◽  
Vol 10 (21) ◽  
pp. 2726
Author(s):  
Xiangwei Zhang ◽  
Quan Li ◽  
Chengying Chen ◽  
Yan Li ◽  
Fuqiang Zuo ◽  
...  
Keyword(s):  
Harmonic Distortion ◽  
Field Potential ◽  
Low Noise ◽  
Recording System ◽  
Oxide Semiconductor ◽  
Total Power ◽  
Cmos Process ◽  
Neural Signals ◽  
Fully Integrated ◽  
Rail To Rail

This paper presents a fully integrated 64-channel neural recording system for local field potential and action potential. It mainly includes 64 low-noise amplifiers, 64 programmable amplifiers and filters, 9 switched-capacitor (SC) amplifiers, and a 10-bit successive approximation register analogue-to-digital converter (SAR ADC). Two innovations have been proposed. First, a two-stage amplifier with high-gain, rail-to-rail input and output, and dynamic current enhancement improves the speed of SC amplifiers. The second is a clock logic that can be used to align the switching clock of 64 channels with the sampling clock of ADC. Implemented in an SMIC 0.18 μm Complementary Metal Oxide Semiconductor (CMOS) process, the 64-channel system chip has a die area of 4 × 4 mm2 and is packaged in a QFN−88 of 10 × 10 mm2. Supplied by 1.8 V, the total power is about 8.28 mW. For each channel, rail-to-rail electrode DC offset can be rejected, the referred-to-input noise within 1 Hz–10 kHz is about 5.5 μVrms, the common-mode rejection ratio at 50 Hz is about 69 dB, and the output total harmonic distortion is 0.53%. Measurement results also show that multiple neural signals are able to be simultaneously recorded.

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