Electrical Characteristics of Ni-CNT-SiO2-SiC Structured 4H-SiC MIS Capacitors

2015 ◽  
Vol 15 (10) ◽  
pp. 7542-7545
Author(s):  
Taeseop Lee ◽  
Min-Seok Kang ◽  
Tae-Jun Ha ◽  
Sang-Mo Koo
Keyword(s):  
Gate Insulator ◽  
Flat Band ◽  
Electrical Characteristics ◽  
Flat Band Voltage ◽  
Voltage Shift ◽  
Insulator Interface ◽  
Current Densities ◽  
Mis Capacitors

In this study, the electrical characteristics of Ni-CNT-SiO2-SiC structured 4H-SiC MIS capacitors were investigated. The effect of CNTs in the gate/insulator interface have been characterized by C–V measurement at 300 to 500K and J–V have also been measured. The experimental flat-band voltage tends to change with or without CNTs. Current densities of both devices are observed a negligible difference up to 3 V. It has been found that adding CNTs and/or change of temperature can help to control the positive and/or negative flat-band voltage shift.

Instability in a-Si:H Thin-Film Transistor: A New Method to Discriminate Between Charge Injection and Defect Creation

1992 ◽  
Vol 258 ◽  
Author(s):  
P. Foglietti ◽  
G. Fortunato ◽  
L. Mariucci ◽  
V. Parisi
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
Close Correlation ◽  
Gate Insulator ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Instability Mechanism ◽  
Insulator Interface ◽  
Different Temperatures

ABSTRACTIn the present work, in order to discriminate the main source of instability in a-Si:H TFTs, the determination of both threshold voltage and flat-band voltage has been performed after bias-stressing the devices with different gate voltages and at different temperatures. Flat-band voltage was determined by the space-charge photomodulation technique. From the close correlation observed between the two quantities, we conclude that the predominant instability mechanism is represented by change in the gate insulator charge at and near the semiconductor/insulator interface.

Analyzing the interface trap density in SiGe capacitors using an abnormal flat band voltage shift at low temperature

2020 ◽  
Vol 13 (11) ◽  
pp. 111006
Author(s):  
Li-Chuan Sun ◽  
Chih-Yang Lin ◽  
Po-Hsun Chen ◽  
Tsung-Ming Tsai ◽  
Kuan-Ju Zhou ◽  
...  
Keyword(s):  
Low Temperature ◽  
Trap Density ◽  
Flat Band ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Flat Band Voltage ◽  
Voltage Shift

scholarly journals Direct evidence of flat band voltage shift for TiN/LaO or ZrO/SiO2 stack structure via work function depth profiling

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Sung Heo ◽  
Hyoungsun Park ◽  
Dong-Su Ko ◽  
Yong Su Kim ◽  
Yong Koo Kyoung ◽  
...  
Keyword(s):  
Work Function ◽  
Direct Evidence ◽  
Depth Profiling ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Voltage Shift

Instability in Amorphous Silicon Dioxide/Amorphous Silicon Structures

1992 ◽  
Vol 284 ◽  
Author(s):  
G. Fortunato ◽  
L. Mariucci
Keyword(s):  
Silicon Dioxide ◽  
Amorphous Silicon ◽  
Threshold Voltage ◽  
Gate Insulator ◽  
Semiconductor Layer ◽  
Flat Band ◽  
Transitional Region ◽  
Flat Band Voltage ◽  
Amorphous Silicon Dioxide ◽  
Silicon Structures

ABSTRACTAmorphous insulator/amorphous silicon structures show, under bias-stress conditions, a drift of the electrical characteristics. In the present work, in order to discriminate the main source of instability in amorphous silicon dioxide/amorphous silicon Thin-Film Transistors, the determination of both threshold voltage and flat-band voltage has been performed after bias-stressing the devices with different gate voltages and at different temperatures. Flat-band voltage was determined by the space-charge photomodulation technique. From the close correlation observed between the two quantities, we conclude that the predominant instability mechanism is represented by change in the gate insulator charge at and near the insulator/semiconductor interface. Time evolution of the threshold voltage shifts has been investigated as a function of stress bias and temperature. The data are explained in terms of a new model based on the dispersive charge injection (hopping of electrons via localised states) into the first 2–3 nm of the gate insulator adjacent to die semiconductor layer (transitional region). Possible origin of the transitional region can be related to the reduction of the gate insulator induced by activated hydrogen, as suggested by photoemission experiments performed with synchrotron radiation on SiO2 bombarded with low energy (100 eV) H-ions.

Flat-band voltage shift in metal-gate/high- k /Si stacks

2011 ◽  
Vol 20 (9) ◽  
pp. 097303 ◽  
Author(s):  
An-Ping Huang ◽  
Xiao-Hu Zheng ◽  
Zhi-Song Xiao ◽  
Zhi-Chao Yang ◽  
Mei Wang ◽  
...  
Keyword(s):  
Flat Band ◽  
Flat Band Voltage ◽  
Metal Gate ◽  
Voltage Shift ◽  
High K

A Formation of SiO2/4H-SiC Interface by Oxidizing Deposited Poly-Si and High Temperature Hydrogen Annealing

1999 ◽  
Vol 572 ◽  
Author(s):  
K. Fukuda ◽  
K. Sakamoto ◽  
K. Nagai ◽  
T. Sekigawa ◽  
S. Yoshida ◽  
...  
Keyword(s):  
High Temperature ◽  
Oxidation Rate ◽  
Vacuum Annealing ◽  
Low Pressure ◽  
Oxidation Temperature ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Hydrogen Annealing ◽  
Voltage Shift ◽  
Mos Structure

ABSTRACTA formation of SiO2/4H-SiC interfaces by oxidizing deposited poly-Si on a 4H-SiC substrate and high temperature hydrogen annealing at low pressure ( 8.5×102 Pa ) has been investigated. The oxidation rate of deposited poly-Si was approximately 100 times faster than that of a SiC. Hydrogen annealing more effectively reduced the flat band voltage shift ( ΔVfb ) of the 4H-SiC MOS structure than argon and vacuum annealing. Moreover, the good SiO2/4H-SiC interface was formed because ΔVfb decreased as the oxidation temperature increased.

The Electrical Characteristics of the MOSCAP Structures with W/WNx/poly Si1−XGeX Gates Stack

2001 ◽  
Vol 670 ◽  
Author(s):  
S.-K. Kang ◽  
J. J. Kim ◽  
D.-H. Ko ◽  
T. H. Ahn ◽  
I. S. Yeo ◽  
...  
Keyword(s):  
Leakage Current ◽  
Low Frequency ◽  
Current Level ◽  
Flat Band ◽  
Electrical Characteristics ◽  
Flat Band Voltage ◽  
Dopant Activation ◽  
Depletion Effect ◽  
Activation Rate ◽  
Boron Penetration

ABSTRACTWe investigated the electrical characteristics of the MOSCAP structures with W/WNx/poly Si1−xGex gates stack using C-V and I-V. The low frequency C-V measurements demonstrated that the flat band voltage of the W/WNx /poly Si0.4Ge0.6 stack was lower than that of W/ WNx /poly Si0.2Ge0.8 stack by 0.3V, and showed less gate-poly-depletion-effect than that of W/ WNx /poly- Si0.2Ge0.8 gates due to the increase of dopant activation rate with the increase of Ge content in the poly Si1−xGex films. As Ge content in poly Si1−xGex increased, the leakage current level increased a little due to the increase of direct tunneling and QBD became higher due to the lower boron penetration.

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