Dissolution and Disintegration of Uniform SiO2 Layers During Direct Silicon Wafer Bonding

1987 ◽  
Vol 107 ◽  
Author(s):  
Kun-Young Ahn ◽  
Ulrich Gösele ◽  
Patrick Smith

AbstractThe conditions for the dissolution and disintegration of SiO2 layers between silicon wafers during direct wafer bonding are discussed in terms of two possible mechanisms. The calculated maximal thickness of a SiO2 layer which may be completely dissolved does not only depend on the bonding temperature and time but also on the starting concentration of interstitial oxygen in the silicon wafers. Finally, the influence of rotational misorientation of the two wafers on the behavior of the S1O2 layers is dealt with.

2005 ◽  
Vol 869 ◽  
Author(s):  
Cher Ming Tan ◽  
Wei Bo Yu ◽  
Wei Jun

AbstractDirect wafer bonding was performed under medium vacuum condition. High bonding strength (larger than 20 MPa) is achieved at the bonding temperature of only 400°C, and the annealing time for complete bonding is less than 5 hours. The bonding efficiency (percentage of the bonded area over entire wafer area) of the medium vacuum wafer bonding (MVWB) is also found to be better than the traditional wafer bonding.Qualitative description of the mechanism of MVWB is proposed in present work. It is believed that the medium vacuum can enhance the out-diffusion of the water molecules and other trapped impurities through the bonding interface which is porous initially. This enhanced diffusion speeds up the chemical reaction for the formation of Si-O-Si, and thus more bonding sites are available before the interface close-up. As a result, we observe an increase in bonding strength, bonding efficiency and the bonding speed.


Author(s):  
S. S. Deng ◽  
J. Wei ◽  
C. M. Tan ◽  
W. B. Yu ◽  
S. M. L. Nai ◽  
...  

Silicon-to-silicon wafer bonding has been successful prepared using sol-gel intermediate layer, which is deposited by spinning acid catalyzed tetraethylthosilicate (TEOS) solution on both two silicon wafer surfaces. To investigate the effects of the process parameters, Draper-Lin small composite design is used, as it requires the minimum runs in the design of experiments. Four process parameters, bonding temperature, solution PH value, solution concentration and solution aging time, have been considered to influence the bond quality, including bond efficiency and bond strength. The bond efficiency is in the range of 40%–90% and bond strength is up to 35 MPa. Statistic analysis shows that the bonding temperature is the dominant factor for the bond quality, while the interaction between temperature and concentration is significant on bond strength. Various characterization techniques, including differential thermal analysis (DTA), atomic force microscopy (AFM), scanning electron microscope (SEM), contact angle measurement and ellipsometry, have been used to study the surface and interface properties. The residual organic species inside the sol-gel coating may be the origin of the significant effect of bonding temperature on the bond efficiency. The interaction effect on bond strength is attributed to the surface hydrophilicity and porosity of sol-gel coating. Higher concentration solution can form lower hydrophilic wafer surface, which results in lower bond strength when bonding temperature is at low level. Whereas, at high bonding temperatures, the increase of porosity of the sol-gel coating prepared by higher sol concentration can absorb more undesired hydrocarbon gas molecules and lead to higher bond strength. The bonding mechanism for the low temperature sol-gel intermediate layer bonding technique is related to the smooth coating surface, porous intermediate layer and water-absent bonding groups.


Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.


Author(s):  
Mayank Srivastava ◽  
Pulak M Pandey

In the present work, a novel hybrid finishing process that combines the two preferred methods in industries, namely, chemical-mechanical polishing (CMP) and magneto-rheological finishing (MRF), has been used to polish monocrystalline silicon wafers. The experiments were carried out on an indigenously developed double-disc chemical assisted magnetorheological finishing (DDCAMRF) experimental setup. The central composite design (CCD) was used to plan the experiments in order to estimate the effect of various process factors, namely polishing speed, slurry flow rate, percentage CIP concentration, and working gap on the surface roughness ([Formula: see text]) by DDCAMRF process. The analysis of variance was carried out to determine and analyze the contribution of significant factors affecting the surface roughness of polished silicon wafer. The statistical investigation revealed that percentage CIP concentration with a contribution of 30.6% has the maximum influence on the process performance followed by working gap (21.4%), slurry flow rate (14.4%), and polishing speed (1.65%). The surface roughness of polished silicon wafers was measured by the 3 D optical profilometer. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) were carried out to understand the surface morphology of polished silicon wafer. It was found that the surface roughness of silicon wafer improved with the increase in polishing speed and slurry flow rate, whereas it was deteriorated with the increase in percentage CIP concentration and working gap.


2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  

1998 ◽  
Vol 70 (1-2) ◽  
pp. 179-184 ◽  
Author(s):  
Steen Weichel ◽  
Roger de Reus ◽  
Michael Lindahl
Keyword(s):  

2000 ◽  
Vol 36 (7) ◽  
pp. 677 ◽  
Author(s):  
M. Alexe ◽  
V. Dragoi ◽  
M. Reiche ◽  
U. Gösele

1997 ◽  
Vol 36 (Part 2, No. 5A) ◽  
pp. L527-L528 ◽  
Author(s):  
Robert W. Bower ◽  
Frank Y.-J. Chin

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