Specific Contact Resistance Measurements on Multilayer Interconnect Structures.

1983 ◽  
Vol 25 ◽  
Author(s):  
H.B. Harrison ◽  
G.K. Reeves

ABSTRACTAn integral part of very large scale integrated (VLSI) circuits is the multilayer structures for electrical interconnection and insulation. Many conducting materials are used for interconnection including polysilicon, silicon, silicides, polycides and metals. An important point in considering these materials is the interconnection between them and the corresponding characterization of the interface by way of the specific contact resistance, which directly affects the interfacial contact resistance.For a planar ohmic contact formed between a metal and any layer with a much larger sheet resistance (for example single crystal silicon) a technique based on the transmission line model provides a method of characterizing these contacts. However, for planar contacts between layers with comparable sheet resistivities for example polysilicon to single crystal silicon this technique must be modified. In this paper we review the transmission line approach used to obtain the specific contact resistance between such layers and provide initial results of measurements made on the poly to single crystal interface. We also present a series of test structures, currently under fabrication that will provide more detailed experimental data.

1999 ◽  
Vol 4 (S1) ◽  
pp. 703-708 ◽  
Author(s):  
R.W. Chuang ◽  
A.Q. Zou ◽  
H.P. Lee ◽  
Z.J. Dong ◽  
F.F. Xiong ◽  
...  

We report both the device fabrication and characterization of InGaN/GaN single quantum well LEDs grown on sapphire substrates using multi-wafer MOVPE reactor. To improve current spreading of the LEDs, a self-aligned process is developed to define LED mesa that is coated with a thin, semi-transparent Ni/Au (40 Å/40 Å) layer. A detailed study on the ohmic contact resistance of Ni/Cr/Au on p-GaN versus annealing temperatures is carried out on transmission line test structures. It was found that the annealing temperatures between 300 to 500 °C yield the lowest specific contact resistance rc ( 0.016 Ω-cm2 at a current density of 66.7 mA/cm). Based on the extracted rc from the transmission line measurement, we estimate that the contact resistance of the p-type GaN accounts for ∼ 88% of the total series resistance of the LED.


1990 ◽  
Vol 184 ◽  
Author(s):  
T. A. Gessert ◽  
T. J. Coutts

ABSTRACTThe importance of contacts to photovoltaic solar cells is often underrated mainly because the required values of specific contact resistance and metal resistivity are often thought to be relatively modest compared with those associated with very large scale integration (VLSI) applications. However, due to the adverse environmental conditions experienced by solar cells, and since many of the more efficient cells are economically advantageous only when operated under solar concentration, the requirements for solar cell contacts are sometimes more severe. For example, at one-sun operation, the upper limit in specific contact resistance is usually taken to be 10−2 Ω-cm2. However, at several hundred suns, this value should be reduced to less than 10−4 Ω-cm2. Additionally, since grid line fabrication often relies on economical plating processes, porosity and contamination issues can be expected to cause reliability and stability problems once the device is fabricated. It is shown that, in practice, these metal resistivity issues can be much more important than issues relating to specific contact resistance and that the problem is similar to that of providing stable, low resistance interconnects in VLSI. This paper is concerned with the design and fabrication of collector grids on the front of the solar cells and, although the discussion is fairly general, it will center on the particular material indium phosphide. This III-V material is currently of great importance for space application because of its resistance to the damaging radiation experienced in space.


1990 ◽  
Vol 216 ◽  
Author(s):  
Patrick W. Leech ◽  
Geoffrey K. Reeves ◽  
Martyn H. Kibel

ABSTRACTThe electrical characteristics of In, Sn, Au and Pt contacts on n-type Hg0.4Cd0.6Te formed in the presence and absence of prior In2+ implantation have been examined. Measurements of specific contact resistance made using a Transmission Line Model have shown that the unimtlanted In/Hg0.4Cd0.6 and Sn/Hg0.4Cd0.6 junctions gave values of pc = 3.0x10−3 to 4.0x10−3 ohm.cm2. Auger sputter profiles of the asdeposited In/Hg0.4Cd0.6 and Sn/Hg0.4Cd0.6 interfaces have shown a significant in-diffusion of the metal overlayer. The influence of shallow In2+ implantation prior to metallization was an increase in pc which occurred above a dose of 1013 ions/cm2. In contrast, Pt and Au formed Schottky barrier diodes on n-type Hg0.4Cd0.6 with øb=0.69eV for Pt and øb=0.79eV for Au. With prior In2+ implantation, both Pt and Au contacts exhibited an ohmic behaviour with pc= 2x10−1 ohm.cm2. These results have significance in the fabrication of devices for 1.0 -2.5μm optical communications.


Author(s):  
Pan Liu

Abstract In modern IC fabrication technology, metal silicide technology in microelectronics has been a standard process to reduce contact resistance. The thickness of metal silicide is an important parameter in reducing the contact resistance, especially, the 130nm, 90nm, and beyond technology. The traditional method to measure the thickness of silicide, however, has a dilemma as to whether to obtain the clear interface or to get the true thickness. This paper reports a novel method to improve the interface contrast and get a true thickness by changing the substrate single crystal contrast. Polishing and ion milling method were used to get thin transmission electron microscopy samples. In this paper, the substrate scattering probability is changed by tilting the samples. Using the method, a clear interface can be developed between the silicide and substrate single crystal silicon can be obtained without affecting the accuracy of the measured silicide thickness.


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