The Simulation of a-Si:H Junction Capacitance Measurements

1993 ◽  
Vol 297 ◽  
Author(s):  
Finley R. Shapiro ◽  
Artjit Das
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Amorphous Semiconductor ◽  
Junction Capacitance ◽  
Capacitance Measurements ◽  
Different Temperatures ◽  
Dc Bias ◽  
Analytic Models ◽  
Hydrogenated Amorphous ◽  
Numerical Simulator

Junction capacitance measurements have been used by many researchers to study the density of states in the mobility gap of hydrogenated amorphous silicon. However, the data analysis methods used for these studies are based on approximate analytic models which may not always be appropriate. In order to understand better the experimental method and the models, we have performed simulations using a numerical simulator which can calculate the complete time-dependent response of an amorphous semiconductor device. The current in a device is simulated as a function of time when a small sinusoidal voltage applied in addition to a DC bias voltage. The out-of-phase and in-phase components of the sinusoidal part of the current are used to calculate the capacitance and series resistance, just as they measured in an experiment. The results of simulated experiments at different temperatures are shown.

Density of States Spectroscopy in p-Type a-Si:H and a-SiC:H

1991 ◽  
Vol 219 ◽  
Author(s):  
Richard S. Crandall ◽  
Stanley J. Salamon ◽  
Yueqin Xu
Keyword(s):  
Density Of States ◽  
Hydrogenated Amorphous Silicon ◽  
Closed Form Expression ◽  
Form Expression ◽  
Junction Capacitance ◽  
Capacitance Measurements ◽  
Boron Doped ◽  
Exponential Increase ◽  
P Type ◽  
Hydrogenated Amorphous

ABSTRACTWe derive a closed form expression for differential junction capacitance applicable when the density of states (DOS) varies exponentially with energy. Using this expression, we analyze p/n junction capacitance measurements that probe the DOS in boron doped hydrogenated amorphous silicon and silicon carbide alloy. In both materials we find that the p-layer DOS is described by an exponential increase with energy above the Fermi level.

Point Contact Admittance Spectroscopy of Thin Film Solar Cells

2013 ◽  
Vol 1538 ◽  
pp. 227-233
Author(s):  
Anthony Vasko ◽  
Kristopher Wieland ◽  
Victor Karpov
Keyword(s):  
Solar Cells ◽  
Open Circuit Voltage ◽  
Semiconductor Device ◽  
Numerical Models ◽  
Point Contact ◽  
Transverse Dimension ◽  
Open Circuit ◽  
Dc Bias ◽  
Displacement Currents ◽  
Analytic Models

ABSTRACTWe present the new characterization technique of multi-dimensional admittance measurements. In standard admittance measurements, a semiconductor device is probed in the transverse dimension, between flat plate contacts. We extend such measurements to distributed, possibly non-uniform solar cells where one of the two contacts has very small (point-like) dimensions. As a result, both the real and displacement currents spread into lateral directions while flowing between the electrodes. Correspondingly, the probing electric field may result in contact voltages that are laterally not equipotential. The spatial voltage distribution will depend on the probing DC bias and AC frequency. The resulting measurement will give information about the system’s lump parameters, such as open circuit voltage, sheet and shunt resistances, as well as the presence and location of shunts. Understanding of the measurement is developed through intuitive and analytic models. Numerical models, utilizing finite element circuits, are used to verify the analytic results, and also may be directly compared to or used to fit experimental data. While our focus is on introducing the physical theory, early experimental results demonstrating spatial scaling are shown.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

scholarly journals Improvement of CdS?CuxS Solar Cell Performance by CdS Etching under Illumination

1992 ◽  
Vol 45 (1) ◽  
pp. 99 ◽  
Author(s):  
AM Al-Dhafiri
Keyword(s):  
Solar Cell ◽  
Single Crystals ◽  
Spectral Response ◽  
Cell Performance ◽  
Optical Characteristics ◽  
Solar Cell Performance ◽  
Junction Capacitance ◽  
Capacitance Measurements ◽  
Mixture Phase ◽  
Etched Surface

The influence of dark and light etching of CdS single crystals on the electrical and optical characteristics of the CdS-Cu",S heterojunction is investigated. It is shown through currentvoltage characteristics, spectral response and junction capacitance measurements that the junction of these cells is strongly affected by the presence of light during the etching process. It is found that when the CuS is formed on an etched CdS surface under light a chalcocite phase (CU2S) is obtained. In contrast, when the CuS layer is grown on a dark etched surface a mixture phase of chalcocite and djurleite (CUI� 96S) is found.

A Quantitative Model for the Metastable Defect Creation in Amorphous Semiconductors by Kev-Electron Irradiation

1994 ◽  
Vol 336 ◽  
Author(s):  
A. Scholz ◽  
B. Schröder ◽  
H. Oechsner
Keyword(s):  
Energy Dissipation ◽  
Electron Irradiation ◽  
Quantitative Agreement ◽  
Quantitative Model ◽  
Amorphous Semiconductor ◽  
Amorphous Semiconductors ◽  
Experimental Results ◽  
Defect Creation ◽  
Hydrogenated Amorphous ◽  
Metastable Defect

ABSTRACTThe interaction mechanisms of keV-electrons with the hydrogenated Amorphous semiconductor are briefly discussed and the differences to the metastable defect creation by photons are set out. Based on the knowlegde of the energy dissipation mechanisms of keV-electrons in the hydrogenated Amorphous semiconductor, a model for the creation of metastable defects by keV-electron irradiation is developed and its quantitative agreement with the experimental results is shown.

Micro-Scale Thermal Sensor Manufacturing for Semiconductor Furnace Chamber

2012 ◽  
Author(s):  
Hongcheon Yang ◽  
Jun Young Kim ◽  
Kwang-Sun Kim
Keyword(s):  
Semiconductor Device ◽  
Furnace Chamber ◽  
Small Scale ◽  
Thermal Sensor ◽  
Micro Scale ◽  
Thermoelectric Voltage ◽  
Scale Temperature ◽  
Pattern Size ◽  
Different Temperatures ◽  
Analog Voltage

As the demand of complex and small scale semiconductor devices has been increased, the measurement technologies were developed to meet the accurate requirement in semiconductor manufacturing process. The uniform temperature requirement on the wafer is the major factor related to the semiconductor device yield. It is normally acquired from the thermocouples following the inner wall of the chamber. However, since the temperature difference between the wall of equipment and the surface of wafer is existed, the actual wafer temperature is commonly measured by a thermocouple wafer to calibrate the temperature measurement accuracy of the equipment. However, as the diameter of the commercial thermocouple wires is larger than the recently demanded pattern size, the TC wafer has not been able to measure the micro scale temperature differences on the micro patterned wafer. We, therefore, designed a micro-scale thermal sensor. The developed sensor has 37 sets of the measurement points on a 4-inch silicon wafer. The size of the measurement point is approximate to 16 um2. Two alloys, chromel and alumel which are as same as the materials of the K-type thermocouple are used to generate the thermoelectric voltage. The sensor has the temperature range of −200°C to 1300°C. The commercial K-type thermocouple extension wires are connected to the pads of the sensor array and they transfer the analog voltage data to a data acquisition device (DAQ). The sensor was calibrated by comparing the EMF voltage at different temperatures to the standard thermocouple EMF voltage. With the developed micro-scale thermal sensor system, the temperature distribution of the wafer in the furnace chamber is obtained.

Charge and Current Transient Measurements on N-Type Hydrogenated Amorphous Silicon in the Relaxation Regime

1994 ◽  
Vol 336 ◽  
Author(s):  
Uwe W. Paschen ◽  
Daewon Kwon ◽  
J. David Cohen
Keyword(s):  
Thermal Emission ◽  
Depletion Region ◽  
Current Transient ◽  
Relaxation Model ◽  
Si Substrate ◽  
Capacitance Measurements ◽  
Transient Data ◽  
P Type ◽  
Hydrogenated Amorphous ◽  
Transient Measurements

ABSTRACTJunction capacitance measurements were employed to study the thermal emission of electrons after application of a voltage filling pulse on a 80 Vppm PH3 doped a-Si:H sample on p+ c-Si substrate. We show that these data can be explained in terms of the relaxation Model. In addition, the time dependence of the charge flow into the depletion region during the filling pulse is investigated by current transient Measurements. Finally, we present charge transient data for a 9 Vppm a-Si:H sample on n+ c-Si substrate and compare the results to those obtained on samples on p-type substrates.

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