Low Thermal Budget Processing Of Organic Dielectrics

1995 ◽  
Vol 381 ◽  
Author(s):  
R. Sharangpani ◽  
R. Singh ◽  
K. C. Cherukuri ◽  
R.P.S. Thakur

AbstractLow dielectric constant organic materials are ideal for use as interconnect dielectrics forintegrated circuits. As compared to silicon dioxide, organic dielectrics with K <3.84 reducepower dissipation, crosstilk and RC delays in interconnects. Curing is essential afterdeposition of these materials to initiate polymerization reactions and form films of desirableelectrical properties. For high performance and reliability, low thermal budget processing isa necessity. Rapid isothermal processing (RIP) based on the use of dual spectral sources isa potential technique to lower the thermal budget. In this paper, we demonstrate the role ofphotoeffects in the curing of polyimide films (K∼2.6) using a rapid isothermal processor witha dual spectral source (Tungsten Halogen and vacuum ultra violet (VUV) lamps) as a sourceof optical and thermal energy. Lamp configurations that allowed a greater availability of ultraviolet and vacuum ultra violet photons on the film to initiate physical and chemical processesallowed a lower curing temperature to achieve the same level of immidization. Furthermore, these samples also gave the lowest leakage current and film stress. Therefore, the rapidheating and cooling features of rapid isothermal processing in conjunction with lowerprocessing temperature through the use of high energy photons to enhance surface reactionsgive superior film properties

1997 ◽  
Vol 469 ◽  
Author(s):  
L. Vedula ◽  
R. Singh ◽  
D. Ratakonda ◽  
A. Rohatgi ◽  
S. Narayanan

ABSTRACTQuantum photoeffects associated with photons of wavelength less than 0.8 micron lead to higher bulk and surface diffusion coefficients. We have exploited this fundamental property in designing rapid isothermal processing (RIP) systems for shallow junction formation in silicon. A detailed comparative study of diffusion, metallization and CVD with and without high energy photons has been carried out. The results show that microscopic defects, cycle time and processing temperature is lower than what can be achieved byconventional methods is realized by using photons in the ultra violet (UV) and vacuum ultra violet (VUV) spectrum.


2017 ◽  
Vol 2017 (1) ◽  
pp. 000569-000575 ◽  
Author(s):  
André Cardoso ◽  
Raquel Pinto ◽  
Elisabete Fernandes ◽  
Steffen Kroehnert

Abstract Due to its versatility for high density, heterogeneous integration, Wafer Level Fan Out (WLFO) packaging has recently seen a tremendous growth in a broad array of applications, from telecommunications and automotive, to optical and environmental sensing, while addressing the challenges of the next big wave of the Internet of Things (IoT). In this context, WLFO is continuously being challenged to include new families of MEMS/NEMS/MOEMS sensors, low thermal budget devices and biochips with microfluidics for biomedical applications. Recent developments in WLFO technology by NANIUM [1] demonstrated the implementation of a keep-out-zone (KOZ) mechanism intended to 1st) protect sensitive sensor areas during the backend processing of WLFO wafers and 2nd) create open zones on the Re-Distribution Layers (RDL). This way, the KOZ mechanism provides a physical, direct path from the embedded device to the environment. This is a necessary feature for environment sensing (e.g., pressure) or to create optical paths free of dielectric and protected from the harsh chemistry steps of the WLFO process. This paper describes new developments on KOZ, implemented with SU-8 photoresist as a WLFO dielectric, whose application is a novelty in the WLFO platform. The use of SU-8 and the KOZ with it, addresses some gaps of the current WLFO technology towards the integration of chips with bio-sensitive areas and sensors with low thermal budget. Due to its well-known bio-compatibility and inert behavior, SU-8 can be used as a neutral dielectric to be in direct contact to target fluids (e.g., sera, blood). Also, due to its low curing temperature, SU-8 allows a very low temperature WLFO process and thus the embedding of temperature-limited devices that have been outside the WLFO realm, for example, magneto-resistive or magnetic-spin sensor chips, which degrades its performance above 160°C. More interestingly, SU-8 exhibits a particular non-conformal behavior, which creates very smooth surfaces even over the mildly rough mold compound area of a fan-out package. Adding to this, SU-8 is readily available in the market in a wide range of thicknesses, spanning from 0.5 μm to &gt;100 μm, and further allowing multiple spin coatings to build thick layers. Thus, SU-8 can provide smooth and deep enough channels for microfluidic flow over the chip sensing areas and, at the same time, provide the necessary layer thickness discrimination for the KOZ mechanism. Combining these features, the SU-8 layers in WLFO can play the triple role of 1) RDL dielectric insulation, 2) KOZ mechanism and 3) embedded microfluidic channels as part of the RDL. In summary, besides the unprecedented use of SU-8 in WLFO packaging, KOZ implementation on SU-8 provides a true, attainable bridge between WLFO and integrated microfluidic applications, for biosensing and biomedical applications in general. Outlooking the potentialities of such a merge, a Fan-Out package can embed several chips interconnected by RDL lines, as it currently allows, and also connected by microfluidic channel for multi-point, multi-function biosensing, constituting a true Lab-on-Package, cost-effective solution. Instead of building all sensing areas and microfluidic channels over a large silicon (Si) chip, this solution builds the feed-in, feed-out areas of the microfluidic channel over the inexpensive fan-out area, minimizing the sensing chip area, with the consequent front-end cost reduction.


2000 ◽  
Vol 39 (Part 1, No. 4B) ◽  
pp. 2162-2166
Author(s):  
Wen-Kuan Yeh ◽  
Yung-Chang Lin ◽  
Tung-Po Chen ◽  
Cheng-Tung Huang ◽  
Sun-Jay Chang ◽  
...  

2020 ◽  
Vol 20 (7) ◽  
pp. 4163-4169
Author(s):  
Seong-Kun Cho ◽  
Won-Ju Cho

In this study, we propose a simplified-single-step microwave annealing (S3-MWA) technique in an O2 ambient, which is a low thermal budget heat treatment method, for the application in solutionprocessed amorphous indium-gallium-zinc oxide (a-IGZO) thin films. For the application of solutionprocessed a-IGZO films in electronic devices, a multi-step post deposition annealing (PDA) process, which involves baking at low temperatures to vaporize the solvent, and high temperature conventional thermal annealing to remove defects in the film, is essential. To simplify the multi-step PDA process, we studied the possibility of reducing the thermal process temperature and time by replacing it with a single-step PDA process using microwave equipment. The electrical properties were compared to investigate the effect of the annealing method and ambient on solution-processed a-IGZO thin film transistors (TFTs). As a result, the S3-MWA-processed a-IGZO TFTs were found to exhibit superior electrical characteristics in comparison with the conventional PDA-processed devices. It was found that the O2 ambient process not only shortened the annealing time of S3-MWA but also improved the electrical properties. Furthermore, the S3-MWA was superior to the conventional PDA in the evaluation of device reliability under a gate bias stress test. The S3-MWA process in the O2 ambient was also responsible for improving the reliability of solution-processed a-IGZO TFTs. Therefore, we confirmed that the proposed S3-MWA in the O2 ambient is a more effective and promising technique than conventional PDA for the low thermal budget treatment of solution-processed a-IGZO TFTs.


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