Optimization of Process Parameter and Temperature Uniformity On Wafers For Rapid Thermal Processing

1995 ◽  
Vol 387 ◽  
Author(s):  
Andreas Tillmann
Keyword(s):  
Standard Deviation ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Simulation Software ◽  
Process Parameter ◽  
Parameter Distribution ◽  
Temperature Uniformity ◽  
New Strategy ◽  
The Impact

AbstractA new strategy based algorithm to optimize process parameter uniformity (e.g.sheet resistance, oxide thickness) and temperature uniformity on wafers in a commercially available Rapid Thermal Processing (RTP) system with independent lamp control is described. The computational algorithm uses an effective strategy to minimize the standard deviation of the considered parameter distribution. It is based on simulation software which is able to calculate the temperature and resulting parameter distribution on the wafer for a given lamp correction table. A cyclical variation of the correction values of all lamps is done while minimizing the standard deviation of the considered process parameter. After the input of experimentally obtained wafer maps the optimization can be done within a few minutes. This technique is an effective tool for the process engineer to use to quickly optimize the homogeneity of the RTP tool for particular process requirements. The methodology will be shown on the basis of three typical RTP applications (Rapid Thermal Oxidation, Titanium Silicidation and Implant Annealing). The impact of variations of correction values for single lamps on the resulting process uniformity for different applications will be discussed.

Optimization of Process Parameter and Temperature Uniformity on Wafers for Rapid Thermal Processing

1995 ◽  
Vol 389 ◽  
Author(s):  
Andreas Tillmann
Keyword(s):  
Standard Deviation ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Simulation Software ◽  
Process Parameter ◽  
Parameter Distribution ◽  
Temperature Uniformity ◽  
New Strategy ◽  
The Impact

ABSTRACTA new strategy based algorithm to optimize process parameter uniformity (e.g. sheet resistance, oxide thickness) and temperature uniformity on wafers in a commercially available Rapid Thermal Processing (RTP) system with independent lamp control is described. The computational algorithm uses an effective strategy to minimize the standard deviation of the considered parameter distribution. It is based on simulation software which is able to calculate the temperature and resulting parameter distribution on the wafer for a given lamp correction table. A cyclical variation of the correction values of all lamps is done while minimizing the standard deviation of the considered process parameter. After the input of experimentally obtained wafer maps the optimization can be done within a few minutes. This technique is an effective tool for the process engineer to use to quickly optimize the homogeneity of the RTP tool for particular process requirements. The methodology will be shown on the basis of three typical RTP applications (Rapid Thermal Oxidation, Titanium Silicidation and Implant Annealing). The impact of variations of correction values for single lamps on the resulting process uniformity for different applications will be discussed.

Monte Carlo Thermal Model of an Integrating Light Pipe for Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
J. C. Thomas ◽  
D. P. Dewitt
Keyword(s):  
Monte Carlo ◽  
Thermal Processing ◽  
Monte Carlo Model ◽  
Rapid Thermal Processing ◽  
Width Ratio ◽  
Temperature Uniformity ◽  
System Parameters ◽  
Light Pipe ◽  
End Wall ◽  
Cavity Width

AbstractA Monte Carlo model is developed to simulate transient wafer heating as a function of system parameters in a kaleidoscope- or integrating light-pipe type cavity with square cross-section. Trends in wafer temperature uniformity are examined as a function of length-to-width ratio, cavity width, and the number of heating lamps. The effect on temperature determination by a radiometer placed in the bottom end wall of the cavity is simulated.

Rapid Thermal Annealing and Oxidation of Silicon Wafers with Back-Side Films

1997 ◽  
Vol 470 ◽  
Author(s):  
A. T. Fiory
Keyword(s):  
Thermal Oxidation ◽  
Sheet Resistance ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Temperature Control ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Back Side ◽  
Control Accuracy

ABSTRACTTemperatures for lamp-heated rapid thermal processing of wafers with various back-side films were controlled by a Lucent Technologies pyrometer which uses a/c lamp ripple to compensate for emissivity. Process temperatures for anneals of arsenic and boron implants were inferred from post-anneal sheet resistance, and for rapid thermal oxidation, from oxide thickness. Results imply temperature control accuracy of 12°C to 17°C at 3 standard deviations.

Simulation of Temperature Effects during Rapid Thermal Processing

1989 ◽  
Vol 146 ◽  
Author(s):  
R. Kakoschek ◽  
E. BuβMann
Keyword(s):  
Stationary State ◽  
Excellent Agreement ◽  
Thermal Processing ◽  
Temperature Effects ◽  
Rapid Thermal Processing ◽  
Nonuniform Heating ◽  
Temperature Uniformity ◽  
Nonuniform Illumination ◽  
Potential Sources ◽  
Wafer Edge

ABSTRACTA complete theory of wafer heating during rapid thermal processing (RTP) is presented. Excellent agreement with experimental results of two commercial RTP systems is obtained. The temperature uniformity is limited by radiation loss at the wafer edge in the stationary state and by nonuniform illumination of the wafer during ramp-up. Structures on wafers are also potential sources for nonuniform heating. Considerable dynamic temperature inhomogeneities during rap-up might limitfu ture applications of RTPe specially when wafer sizes become larger. Possible improvements are suggested regarding adequate process cycling, chip and equipment design.

Ge nanocrystals in MOS-memory structures produced by molecular-beam epitaxy and rapid-thermal processing

2004 ◽  
Vol 830 ◽  
Author(s):  
A. Nylandsted Larsen ◽  
A. Kanjilal ◽  
J. Lundsgaard Hansen ◽  
P. Gaiduk ◽  
P. Normand ◽  
...  
Keyword(s):  
Molecular Beam Epitaxy ◽  
Process Parameters ◽  
Gate Voltage ◽  
Thermal Processing ◽  
Molecular Beam ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Mos Capacitors ◽  
Very High ◽  
Ge Nanocrystals

ABSTRACTA method of forming a sheet of Ge nanocrystals in a SiO2 layer based on molecular beam epitaxy (MBE) and rapid thermal processing (RTP) is presented. The method takes advantage of the very high precision by which a very thin Ge layer can be deposited by MBE. With proper choice of process parameters the nanocrystal size can be varied between ∼3 and ∼8 nm and the area-density between ∼1×1011 and ∼1×1012 dots/cm2. The tunneling oxide thickness is determined by the thickness of a thermally grown SiO2 layer, and is typically 4 nm. C-V measurements of MOS capacitors reveal hole and electron injection from the substrate into the nanocrystals. Memory windows of about 0.2 and 0.5 V for gate-voltage sweeps of 3 and 6 V, respectively, are achieved.

Stability of Silicide Films Under Post-Annealing: a Dopant Effect

1993 ◽  
Vol 309 ◽  
Author(s):  
C.L. Shepard ◽  
W.A. Lanford ◽  
A.K. Pant ◽  
S. P. Murarka
Keyword(s):  
Surface Layer ◽  
Growth Rates ◽  
Thermal Processing ◽  
Linear Growth ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Oxide Surface ◽  
Oxide Formation ◽  
Post Annealing ◽  
Backscattering Analysis

AbstractThe formation of PtSi films by rapid thermal processing of e-beam evaporated Pt on <100> Si has been studied. The current study found that PtSi films have the potentially useful property of oxidizing, i.e., forming a surface layer of Si02 which may be useful for patterning. Rapid oxide formation is found with, possibly, linear growth rates when the film is doped with As to 8E15 atoms/cm2 at 80 KeV but insignificant oxidation if the film is undoped or B-doped. Rutherford backscattering analysis shows significant redistribution of the As during silicidation and oxidation with As excluded from the silicide, diffusing to the oxide and especially the oxide surface. Post-silicidation anneals have been done in a conventional tube furnace at 650ºC for up to 60 minutes and form an oxide thickness of up to 200 nm. NiSi films appear stable if Bdoped, oxidize with Ni piling up at the Si02/Si interface if undoped, and are unstable with Ni diffusing deep into the Si if As-doped.

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