Ge nanocrystals in MOS-memory structures produced by molecular-beam epitaxy and rapid-thermal processing

2004 ◽  
Vol 830 ◽  
Author(s):  
A. Nylandsted Larsen ◽  
A. Kanjilal ◽  
J. Lundsgaard Hansen ◽  
P. Gaiduk ◽  
P. Normand ◽  
...  

ABSTRACTA method of forming a sheet of Ge nanocrystals in a SiO2 layer based on molecular beam epitaxy (MBE) and rapid thermal processing (RTP) is presented. The method takes advantage of the very high precision by which a very thin Ge layer can be deposited by MBE. With proper choice of process parameters the nanocrystal size can be varied between ∼3 and ∼8 nm and the area-density between ∼1×1011 and ∼1×1012 dots/cm2. The tunneling oxide thickness is determined by the thickness of a thermally grown SiO2 layer, and is typically 4 nm. C-V measurements of MOS capacitors reveal hole and electron injection from the substrate into the nanocrystals. Memory windows of about 0.2 and 0.5 V for gate-voltage sweeps of 3 and 6 V, respectively, are achieved.

2005 ◽  
Vol 81 (2) ◽  
pp. 363-366 ◽  
Author(s):  
A. Kanjilal ◽  
J.L. Hansen ◽  
P. Gaiduk ◽  
A. Nylandsted Larsen ◽  
P. Normand ◽  
...  

1991 ◽  
Vol 69 (4) ◽  
pp. 2238-2244 ◽  
Author(s):  
Akira Ito ◽  
Akira Usami ◽  
Akio Kitagawa ◽  
Takao Wada ◽  
Yutaka Tokuda ◽  
...  

1986 ◽  
Vol 59 (3) ◽  
pp. 888-891 ◽  
Author(s):  
Kazuhiro Kudo ◽  
Yunosuke Makita ◽  
Ichiro Takayasu ◽  
Toshio Nomura ◽  
Toshihiko Kobayashi ◽  
...  

2008 ◽  
Vol 573-574 ◽  
pp. 207-228 ◽  
Author(s):  
Silke Paul ◽  
Wilfried Lerch

This work presents a summary on the use of rapid thermal processing for implant annealing. It gives a short historical overview of rapid thermal processing systems and the first implant anneal processes on these newly developed tools. We then looked in detail on the soak anneal and spike anneal processes and the influence of certain process parameters. For the soak anneal influences of the ambient, either oxidizing or nitriding, were evaluated. The results of spike anneal processes are influenced by the pre-stabilization temperature, ramp-up and ramp-down rate, peak temperature, and gaseous ambient. The need for shallow, abrupt and highly activated junctions leads to co-implantation of species like fluorine or carbon in conjunction with pre-amorphization. Nowadays, combinations of spike and millisecond annealing as well as millisecond annealing alone are in the focus.


1996 ◽  
Vol 438 ◽  
Author(s):  
H. Shibata ◽  
S. Kimura ◽  
P. Fons ◽  
A. Yamada ◽  
Y. Makita ◽  
...  

AbstractA combined ion beam and molecular beam epitaxy (CIBMBE) method was applied for the deposition of a Ge1-xCx alloy on Si(100) using a low-energy ( 50 – 100 eV ) C+ ion beam and a Ge molecular beam. Metastable Ge1-xCx solid solutions were formed up to x = 0.047, and the CIBMBE method was shown to have a very high potential to grow metastable Ge1-x,Cx alloys. It was also revealed that the sticking coefficient of C+ ions into Ge was ∼28% for Ei, = 100 eV and ∼18% for Ei = 50 eV. Structural characterization suggests that the deposited films are single crystals grown epitaxially on the substrate with twins on {111} planes. Characterization of lattice dynamics using Raman spectroscopy suggested that the deposited layers have a small amount of ion irradiation damage.


1995 ◽  
Vol 387 ◽  
Author(s):  
Andreas Tillmann

AbstractA new strategy based algorithm to optimize process parameter uniformity (e.g.sheet resistance, oxide thickness) and temperature uniformity on wafers in a commercially available Rapid Thermal Processing (RTP) system with independent lamp control is described. The computational algorithm uses an effective strategy to minimize the standard deviation of the considered parameter distribution. It is based on simulation software which is able to calculate the temperature and resulting parameter distribution on the wafer for a given lamp correction table. A cyclical variation of the correction values of all lamps is done while minimizing the standard deviation of the considered process parameter. After the input of experimentally obtained wafer maps the optimization can be done within a few minutes. This technique is an effective tool for the process engineer to use to quickly optimize the homogeneity of the RTP tool for particular process requirements. The methodology will be shown on the basis of three typical RTP applications (Rapid Thermal Oxidation, Titanium Silicidation and Implant Annealing). The impact of variations of correction values for single lamps on the resulting process uniformity for different applications will be discussed.


1997 ◽  
Vol 470 ◽  
Author(s):  
A. T. Fiory

ABSTRACTTemperatures for lamp-heated rapid thermal processing of wafers with various back-side films were controlled by a Lucent Technologies pyrometer which uses a/c lamp ripple to compensate for emissivity. Process temperatures for anneals of arsenic and boron implants were inferred from post-anneal sheet resistance, and for rapid thermal oxidation, from oxide thickness. Results imply temperature control accuracy of 12°C to 17°C at 3 standard deviations.


2000 ◽  
Vol 638 ◽  
Author(s):  
WK Choi ◽  
V Ng ◽  
YW Ho ◽  
TB Chen ◽  
V Ho

AbstractThe high resolution transmission electron microscopy and Raman spectroscopy results of germanium nanocrystals embedded in SiO2 synthesized by rapid thermal processing (RTA) have been presented. From the results of samples with different Ge concentrations, it was concluded that there is a narrow window in the Ge concentration that can produce nanocrystals. We also showed that it is possible to vary RTA duration or temperature to produce Ge nanocrystals with varying sizes. Our results therefore suggest that it is possible to utilize (i) annealing duration and; (ii) temperature to tune crystal sizes for optoelectronic applications.


Sign in / Sign up

Export Citation Format

Share Document