Electrical Properties of Polycrystalline-Silicon Thin Films for VLSI

The electrical properties of polycrystalline silicon differ from those of single-crystal silicon because of the effect of grain boundaries. At low and moderate dopant concentrations, dopant segregation to and carrier trapping at grain boundaries reduces the conductivity of polysilicon markedly compared to that of similarly doped single-crystal silicon. Because the properties of moderately doped polysilicon are limited by grain boundaries, modifying the carrier traps at the grain boundaries by introducing hydrogen to saturate dangling bonds improves the conductivity of polysilicon and allows fabrication of moderate-quality transistors with their active regions in the polycrystalline films. Removing the grain boundaries by melting and recrystallization allows fabrication of high-quality transistors. When polysilicon is used as an interconnecting layer in integrated circuits, its limited conductivity can degrade circuit performance. At high dopant concentrations, the active carrier concentration is limited by the solid solubility of the dopant species in crystalline silicon. The current through oxide grown on polysilicon can be markedly higher than that on oxide of similar thickness grown on singlecrystal silicon because the rough surface of a polysilicon film enhances the local electric field in oxide thermally grown on it. Consequently, the structure must be controlled to obtain reproducible conduction through the oxide. The differences in the behavior of polysilicon and single-crystal silicon and the limited electrical conductivity in polysilicon are having a greater impact on integrated circuits as the feature size decreases and the number of devices on a chip increases in the VLSI era.