GaP-based MIS Capacitors Using a SiN Gate Dielectric

2003 ◽  
Vol 764 ◽  
Author(s):  
A. Chen ◽  
J. Woodall ◽  
X.W. Wang ◽  
T.P. Ma
Keyword(s):  
Electric Field ◽  
Gallium Phosphide ◽  
Gate Dielectric ◽  
Interface State ◽  
State Density ◽  
Constant Current ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Effective Electric Field ◽  
Mis Capacitors

AbstractGallium Phosphide (GaP) Metal-Insulator-Semiconductor (MIS) capacitors were fabricated with synthesized SiN as the gate dielectric. The interface property and the SiN bulk quality were studied with capacitance-voltage (C-V) measurements and current-voltage (I-V) measurements. The total interface state density of 3×1012 cm-2 and the fixed charge density in SiN of 7×1012cm-2 were estimated from the C-V measurements. The leakage current density was as low as 15nA/cm2 at an effective electric field of 3MV/cm. The effective electric field in SiN at breakdown was as high as 10MV/cm. Constant current stress measurements showed bulk trap density of 2×1011 cm-2 in SiN, which is much lower than that for CVD SiN or SiO2.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

scholarly journals Barrier Modification by Methyl Violet Organic Dye Molecules of Ag/P-Inp Structures

2016 ◽  
Vol 2 (3) ◽  
pp. 7 ◽  
Author(s):  
Ömer Güllü
Keyword(s):  
Barrier Height ◽  
Methyl Violet ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Mis Structure ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Mis Diode

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.

The Effect of Silicide Formation on the Electrical Properties of Gate Oxides

1992 ◽  
Vol 260 ◽  
Author(s):  
J. P. Gambino ◽  
B. Cunningham ◽  
D. A. Buchanan
Keyword(s):  
Gate Oxide ◽  
Interface State ◽  
State Density ◽  
Breakdown Field ◽  
Rapid Thermal Anneal ◽  
Gate Oxides ◽  
Mos Capacitors ◽  
Oxide Breakdown ◽  
Current Voltage ◽  
Capacitance Voltage

ABSTRACTCoSi2, or TiSi2 formation on gate polysilicon can degrade the current-voltage and capacitance-voltage characteristics of MOS capacitors. Degradation of the gate oxide breakdown field is much more severe for capacitors with TiSi2 than for those with COSi2 TEM reveals evidence for a reaction at the interface between TiSi2 and SiO2, whereas there is no observable reaction between COSi2 and SiO2- The low breakdown fields for devices with TiSi2 may be due to thinning of the gate oxide by the interfacial reaction or mechanical deformation. A high density of electron traps and a small reduction in the breakdown field is observed when COSi2 contacts the gate, possibly due to a compressive stress in the oxide exerted by the suicide. In addition, an increase in the interface state density at the Si-SiO2 interface is seen for all samples exposed to a rapid thermal anneal (RTA) at 800°C, possibly due to the release of H from dangling bonds.

POST‐METALLIZATION ANNEALING OF ULTRA‐THIN REMOTE PLASMA ENHANCED CVD OXIDES

1996 ◽  
Vol 446 ◽  
Author(s):  
L‐Å Ragnarsson ◽  
P. Lundgren ◽  
D. Landheer
Keyword(s):  
Vapour Deposition ◽  
Chemical Vapour ◽  
Interface State ◽  
State Density ◽  
Silicon Substrates ◽  
Constant Voltage ◽  
Remote Plasma ◽  
Current Voltage ◽  
Voltage Stress ◽  
Capacitance Voltage

AbstractA remote plasma enhanced chemical vapour deposition (RPECVD) process was used to deposit thin silicon dioxides on silicon substrates. The oxide properties were compared with thermal oxides with similar thicknesses (2.5–9 nm) using capacitance‐voltage (C‐V), current‐voltage (I‐V) and constant voltage stress measurements (I‐t). Post‐metallization annealing (PMA) showed different annealing dynamics as compared to the thermal oxides for anneal times below approximately 1000 s (at 260 °C) after which the dynamics were similar. The deposited oxides had a higher initial interface state density (Dit) than the thermal oxides, but after PMA they were found to be of the same quality as the thermal oxides. Positive charging of the deposited oxides during constant voltage stress was the same as for thermal oxides, showing that the stress endurance of the two are similar.

Heterojuncion Study of Ga0.92In08as(P+)/GaAs(n) Diodes: Correlation of Electrical and Strucrural Characteristics

1989 ◽  
Vol 160 ◽  
Author(s):  
Y.W. Choi ◽  
C.R. Wie ◽  
K.R. Evans ◽  
C.E. Stutz
Keyword(s):  
Low Frequency ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Level ◽  
Fermi Level Pinning ◽  
Pinning Effect ◽  
Quasi Fermi Level ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractDifferent in-plane mismatch was introduced by varying the Ga 0.92In0.08As(p+) epilayer thickness (h-0.1, 0.25, 0.5 and lum) on GaAs(n)/GaAs(n+) structure. For sample with h-lum, quasi-Fermi level pinning effect was observed in low temperature forward Current-Voltage characteristic due to high density misfit dislocation. From Vint measurement at low frequency limit in C-2 vs Voltage plot, interface state density Nss was obtained. From Capacitance-Voltage measurements at different frequencies, single-level interface state density Ns was estimated using Schokley-Read-Hall statistics. Both Nss and Ns show their linear relation with epilayer in-plane mismatch. Admittance Spectroscopy shows an interface trap level at about Ev + 0.36 eV with the hole capture cross section cp = 2.7×10-15 cm-2 for the h-lum sample, and at Ev + 0.21 eV with cP = 2.4×10-16 cm-2 for the h-0.5um sample.

scholarly journals Barrier Modification by Methyl Violet Organic Dye Molecules of Ag/P-Inp Structures

2016 ◽  
Vol 2 (3) ◽  
pp. 7 ◽  
Author(s):  
Ömer Güllü
Keyword(s):  
Barrier Height ◽  
Methyl Violet ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Mis Structure ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Mis Diode

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.

scholarly journals Barrier Modification by Methyl Violet Organic Dye Molecules of Ag/P-Inp Structures

2016 ◽  
Vol 2 (3) ◽  
pp. 7
Author(s):  
Ömer Güllü
Keyword(s):  
Barrier Height ◽  
Methyl Violet ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Mis Structure ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Mis Diode

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.

scholarly journals Barrier Modification by Methyl Violet Organic Dye Molecules of Ag/P-Inp Structures

2016 ◽  
Vol 5 (1) ◽  
pp. 7
Author(s):  
Ömer Güllü
Keyword(s):  
Barrier Height ◽  
Methyl Violet ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Mis Structure ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Mis Diode

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.

The Properties Of a-Si:H/c-Si Heterostructures Prepared By 55 kHz Pecvd For Solar Cell Application

1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Low Frequency ◽  
Reverse Current ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Solar Cell Application ◽  
Current Voltage ◽  
Frequency Plasma ◽  
Device Applications

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.

Ultrathin Gate Dielectric Growth at Reduced Pressure

1994 ◽  
Vol 342 ◽  
Author(s):  
Robert McIntosh ◽  
Carl Galewski ◽  
John Grant
Keyword(s):  
Gate Dielectric ◽  
Charge Trapping ◽  
Cmos Technology ◽  
Interface State ◽  
Constant Current ◽  
Reduced Pressure ◽  
Current Stress ◽  
Ultrathin Oxides ◽  
State Generation ◽  
Improved Characteristics

The Growth of ultrathin oxides in N2O ambient has been a subject of extensive research for submicron CMOS technology. Oxides grown in N2O tend to have a higher charge-to-breakdown, less charge trapping under constant current stress, and less interface state generation under current stress and radiation than conventional oxides grown in oxygen [1,2]. In addition the penetration of boron through N2O oxides is significantly less than through conventional thermal oxides [3]. The improved characteristics of N2O are due to an interfacial pileup of nitrogen atoms [1-3]. Thus the growth of thermal oxides in N2O provides a method for obtaining many of the more favorable aspects of reoxidized-nitrided silicon dioxides, with a much simpler process.

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