Heterojuncion Study of Ga0.92In08as(P+)/GaAs(n) Diodes: Correlation of Electrical and Strucrural Characteristics

1989 ◽  
Vol 160 ◽  
Author(s):  
Y.W. Choi ◽  
C.R. Wie ◽  
K.R. Evans ◽  
C.E. Stutz
Keyword(s):  
Low Frequency ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Level ◽  
Fermi Level Pinning ◽  
Pinning Effect ◽  
Quasi Fermi Level ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractDifferent in-plane mismatch was introduced by varying the Ga 0.92In0.08As(p+) epilayer thickness (h-0.1, 0.25, 0.5 and lum) on GaAs(n)/GaAs(n+) structure. For sample with h-lum, quasi-Fermi level pinning effect was observed in low temperature forward Current-Voltage characteristic due to high density misfit dislocation. From Vint measurement at low frequency limit in C-2 vs Voltage plot, interface state density Nss was obtained. From Capacitance-Voltage measurements at different frequencies, single-level interface state density Ns was estimated using Schokley-Read-Hall statistics. Both Nss and Ns show their linear relation with epilayer in-plane mismatch. Admittance Spectroscopy shows an interface trap level at about Ev + 0.36 eV with the hole capture cross section cp = 2.7×10-15 cm-2 for the h-lum sample, and at Ev + 0.21 eV with cP = 2.4×10-16 cm-2 for the h-0.5um sample.

The Properties Of a-Si:H/c-Si Heterostructures Prepared By 55 kHz Pecvd For Solar Cell Application

1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Low Frequency ◽  
Reverse Current ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Solar Cell Application ◽  
Current Voltage ◽  
Frequency Plasma ◽  
Device Applications

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.

Low- and High-Frequency C–V Characteristics of Au/n-GaN/n-GaAs

2018 ◽  
Vol 18 (06) ◽  
pp. 1850039
Author(s):  
Abderrezzaq Ziane ◽  
Mohamed Amrani ◽  
Abdelaziz Rabehi ◽  
Zineb Benamara
Keyword(s):  
Schottky Diode ◽  
High Frequency ◽  
High Vacuum ◽  
Low Frequency ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Ultra High Vacuum ◽  
Active Nitrogen ◽  
Capacitance Voltage

Au/GaN/GaAs Schottky diode created by the nitridation of n-GaAs substrate which was exposed to a flow of active nitrogen created by a discharge source with high voltage in ultra-high vacuum with two different thicknesses of GaN layers (0.7[Formula: see text]nm and 2.2[Formula: see text]nm), the I–V and capacitance–voltage (C–V) characteristics of the Au/n-GaN/n-GaAs structures were studied for low- and high-frequency at room temperature. The measurements of I–V of the Au/n-GaN/n-GaAs Schottky diode were found to be strongly dependent on bias voltage and nitridation process. The electrical parameters are bound by the thickness of the GaN layer. The capacitance curves depict a behavior indicating the presence of interface state density, especially in the low frequency. The interface states density was calculated using the high- and low-frequency capacitance curves and it has been shown that the interface states density decreases with increasing of nitridation of the GaAs.

In-Situ Etch to Improve Chemical Beam Epitaxy Regrown AlgaAs/GaAs Interfaces for HBT Applications

1996 ◽  
Vol 448 ◽  
Author(s):  
Y.M. Hsin ◽  
N. Y. Li ◽  
C. W. Tu ◽  
P. M. Asbeck
Keyword(s):  
Etching Rate ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Chemical Beam Epitaxy ◽  
Capacitance Voltage ◽  
Substrate Temperatures ◽  
Etching Effect

AbstractWe have studied the etching effect of AlxGa1-xAs (0≤ x ≤ 0.5) by trisdimethylaminoarsenic (TDMAAs) at different substrate temperatures, and the quality of the resulting etched/regrown GaAs interface. We find that the etching rate of AlxGa1-x As decreases with increasing Al composition, and the interface trap density of the TDMAAs etched/regrown interface can be reduced by about a factor of 10 as deduced from capacitance-voltage carrier profiles. A smooth surface morphology of GaAs with an interface state density of 1.4×l011 cm−2 can be obtained at a lower in-situ etching temperature of 550°C. Moreover, by using this in-situ etching the I-V characteristics of regrown p-n junctions of Al0.35Ga0.65As/Al0.25Ga0.75As and Al0.35Ga0.65As/GaAs can be improved.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

Capacitance-Voltage and Interface State Density Characteristics of GaAs and In0.53Ga0.47As MOS Capacitors Incorporating a PECVD Si3N4 Dielectric

2019 ◽  
Vol 35 (3) ◽  
pp. 415-430 ◽  
Author(s):  
Eamon O'Connor ◽  
Vladimir Djara ◽  
Scott Monaghan ◽  
Paul Hurley ◽  
Karim Cherkaoui
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Capacitance Voltage
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