Millisecond Microwave Annealing: Reaching the 32 Nm Node

2004 ◽  
Vol 810 ◽  
Author(s):  
Keith Thompson ◽  
John H. Booske ◽  
R.L. Ives ◽  
John Lohr ◽  
Yurii A. Gorelov ◽  
...  

ABSTRACTThe next generation of Si devices requires thermal treatments of 1200°C – 1300°C but can only withstand temperatures above 800°C for a few milliseconds. Current rapid thermal processing techniques cannot meet these requirements. We have designed, constructed, and tested a microwave reactor that heats Si to 1300°C in only a few milliseconds and cools the wafer at a rate that exceeds a million degrees per second. Applying millisecond microwave annealing to ultra-shallow junction formation in advanced Si devices shows that this technique meets or exceeds the thermal processing requirements for the next several generations of Si devices.

1997 ◽  
Vol 70 (13) ◽  
pp. 1700-1702 ◽  
Author(s):  
R. Singh ◽  
K. C. Cherukuri ◽  
L. Vedula ◽  
A. Rohatgi ◽  
S. Narayanan

1986 ◽  
Vol 71 ◽  
Author(s):  
Tom Sedgwick

AbstractRapid Thermal Processing (RTP) can minimize processing time and therefore minimize dopant motion during annealing of ion implanted junctions. In spite of the advantage of short time annealing using RTP, the formation of shallow B junctions is thwarted by channeling, transient enhanced diffusion and concentration enhanced diffusion effects all of which lead to deeper B profiles. Channeling and transient enhanced diffusion can be avoided by preamorphizing the silicon before the B implant. However, defects at the original amorphous/crystal boundary persist after annealing. Very low energy B implantation can lead to very shallow dopant profiles and in spite of channeling effects, offers an attractive potential shallow junction technology. In all of the shallow junction formation techniques RTP is required to achieve both high activation of the implanted species and minimal diffusion of the implanted dopant.


2003 ◽  
Vol 208-209 ◽  
pp. 345-351 ◽  
Author(s):  
M. Hernandez ◽  
J. Venturini ◽  
D. Zahorski ◽  
J. Boulmer ◽  
D. Débarre ◽  
...  

1992 ◽  
Vol 260 ◽  
Author(s):  
Eric R. White ◽  
S. Ashok ◽  
D. L. Allara

ABSTRACTn+-n and n+-p junctions were formed on n-type and p-type Si using a thin film of phosphorus obtained from a simple vapor source, and driving in the dopant atoms in a rapid thermal processing (RTP) system. The vapor treatment consisted of heating powdered red phosphorus in a nitrogen ambient and allowing the resulting phosphorus vapor to deposit on the Si samples. This was done in an inexpensive apparatus constructed from flasks and test tubes. Following the vapor treatment, an SiOxfilm was sputtered over the phosphorus coating in order to serve as a capping layer during subsequent RTP drive-in that forms the junction. The junction properties were characterized by spreading resistance and electrical (IV and CV) measurements after deposition of metal contacts layers.


1987 ◽  
Vol 92 ◽  
Author(s):  
R. S. Hockett

ABSTRACTRapid Thermal Processing is being evaluated in the IC industry as a way to meet the thermal budget requirements of reduced scaling in high performance Si IC's. As scaling is reduced and alternative processing is used, the study of low level interfacial impurities is expected to become more important. An example is presented here for the redistribution of interfacial impurities under RTP for polysilicon capped silicon similar to that proposed for shallow junction bipolar transistors.


1993 ◽  
Vol 32 (Part 1, No. 1B) ◽  
pp. 389-395 ◽  
Author(s):  
Hiroshi Kotaki ◽  
Katsunori Mitsuhashi ◽  
Junkou Takagi ◽  
Yoshiro Akagi ◽  
Masayoshi Koba

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