High-Performance Amorphous Silicon Emitter for Crystalline Silicon Solar Cells

2005 ◽  
Vol 862 ◽  
Author(s):  
T.H. Wang ◽  
E. Iwaniczko ◽  
M.R. Page ◽  
Q. Wang ◽  
D.H. Levi ◽  
...  

AbstractThin hydrogenated amorphous silicon (a-Si:H) layers deposited by hot-wire chemical vapor deposition (HWCVD) are studied for use as the emitter in silicon heterojunction (SHJ) solar cells on p-type crystalline silicon wafers. Low interface recombination velocity and high open-circuit voltage are achieved by a low substrate temperature (<150°C) intrinsic a-Si:H deposition which ensures immediate amorphous silicon deposition. This is followed by deposition of n-type a-Si:H at a higher temperature (>200°C) which improves dopant activation and other properties. A prolonged atomic H pretreatment to clean the c-Si surface is actually detrimental because it creates additional defects in the c-Si lattice. However, a brief H pretreatment is beneficial and may render the intrinsic interlayer unnecessary. The n-type a-Si:H thickness must be limited to ~5 nm to minimize current loss, because the phosphorous doped a-Si:H layer has significant absorption in the usable solar spectrum. Using the optimized a-Si:H emitter, we obtain efficiency of nearly 17% on planar float-zone (FZ) silicon and 15% on planar Czochralski (CZ) silicon substrates with aluminum back-surface-field (Al-BSF) and contacts.

Solar RRL ◽  
2021 ◽  
Author(s):  
Linkun Zhang ◽  
Lanxiang Meng ◽  
Lun Cai ◽  
Zhiming Chen ◽  
Wenjie Lin ◽  
...  

2011 ◽  
Vol 95 (1) ◽  
pp. 26-29 ◽  
Author(s):  
Dae-Yong Lee ◽  
Hyun-Ho Lee ◽  
Jun Yong Ahn ◽  
Hyun Jung Park ◽  
Jong Hwan Kim ◽  
...  

2004 ◽  
Vol 808 ◽  
Author(s):  
D.H. Levi ◽  
C.W. Teplin ◽  
E. Iwaniczko ◽  
R.K. Ahrenkiel ◽  
H.M. Branz ◽  
...  

ABSTRACTWe have applied real-time spectroscopic ellipsometry (RTSE) as both an in-situ diagnostic and post-growth analysis tool for hydrogenated amorphous silicon (a-Si:H)/crystalline silicon (c-Si) heterojunction with intrinsic thin-layer (HIT) solar cells grown by hot-wire chemical vapor deposition. RTSE enables precise thickness control of the 5 to 25 nm layers used in these devices, as well as monitoring crystallinity and surface roughness in real time. Utilizing RTSE feedback, but without extensive optimization, we have achieved a photovoltaic energy conversion efficiency of 14.1% on an Al-backed p-type Czochralski c-Si wafer coated with thin i and n layers on the front. Open-circuit voltages above 620 mV indicate effective passivation of the c-Si surface by the a-Si:H intrinsic layer. Lifetime measurements using resonant coupled photoconductive decay indicate that surface recombination velocities can approach 1 cm/s. RTSE and transmission electron microscopy show that the intrinsic a-Si:H i-layers grow as a mixture of amorphous and nano-crystalline silicon.


2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Hyomin Park ◽  
Sung Ju Tark ◽  
Chan Seok Kim ◽  
Sungeun Park ◽  
Young Do Kim ◽  
...  

To improve the efficiency of crystalline silicon solar cells, should be collected the excess carrier as much as possible. Therefore, minimizing the recombination both at the bulk and surface regions is important. Impurities make recombination sites and they are the major reason for recombination. Phosphorus (P) gettering was introduced to reduce metal impurities in the bulk region of Si wafers and then to improve the efficiency of Si heterojunction solar cells fabricated on the wafers. Resistivity of wafers was measured by a four-point probe method. Fill factor of solar cells was measured by a solar simulator. Saturation current and ideality factor were calculated from a dark current density-voltage graph. External quantum efficiency was analyzed to assess the effect of P gettering on the performance of solar cells. Minority bulk lifetime measured by microwave photoconductance decay increases from 368.3 to 660.8 μs. Open-circuit voltage and short-circuit current density increase from 577 to 598 mV and 27.8 to 29.8 mA/cm2, respectively. The efficiency of solar cells increases from 11.9 to 13.4%. P gettering will be feasible to improve the efficiency of Si heterojunction solar cells fabricated on P-doped Si wafers.


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