Tunable Sub Threshold Logic Design Through Adaptive Feedback Equalization

An Efficient tunable subthreshold logic circuit planned by utilizing adaptive feedback equalization circuit. This circuit utilized in the Ladner Fischer adder. This circuit utilized in a successive advanced logic circuit to moderate the cycle variety impacts and lessen the prevailing spillage energy part in the subthreshold area. Feedback equalizer circuit changes the switching edge of its inverter. It depends on the output of the flip-flop in the past cycle to lessen the charging and releasing season of the flip-flop's information capacitance. Besides, the more modest info capacitance of the feedback equalizer lessens the switching season of the last door in the combinational logic block. Likewise present point by point energy-performance models of the adaptive feedback equalizer circuit.

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The Potential of Descriptive Building Specifications as an Alternative to Detailed Normative Calculations

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.887.164 ◽

2019 ◽

Vol 887 ◽

pp. 164-171

Author(s):

Marija Marković ◽

Ulrich Pont ◽

Ardeshir Mahdavi

Keyword(s):

Performance Indicators ◽

Key Performance Indicators ◽

Energy Performance ◽

Building Envelope ◽

Building Performance ◽

The Past ◽

Comprehensive Knowledge ◽

Master Thesis ◽

Relevant Calculation ◽

Calculation Procedures

Energy performance calculations are stipulated by law in most European countries. Thereby, different calculation schemes have been developed in the past years in different countries. The physical processes in buildings were simplified in terms of normative calculation routines in most of these schemes. A major idea behind these simplifications was to enable different stakeholders (practitioners, engineers, and architects) to issue energy certificates without being simulation experts. Moreover, the simplifications needed to be described thoroughly in corresponding guidelines to ensure and facilitate the comparability of the energy performance of different buildings. However, neither of these objectives can be considered to be fully met. Regarding the former, the normative calculation procedures increased in complexity in the past years, so that the issuing of energy certificates requires not only the stakeholder’s expertise but also a comprehensive knowledge of the standards that form the calculation method. Regarding the latter, recent research efforts revealed that many guidelines do not fully cover every aspect of the calculation procedures and the assumptions regarding required input data. Thus, the comparability of energy certificates has to be strongly questioned, as a number of relevant calculation parameters are dependent on the interpretation of the corresponding issuer.Given this background, alternative approaches to building performance evaluation would be of interest. Previous approaches by different researchers suggested so called prescriptive indicators, which can be derived by basic building data (for instance, geometry and thermal quality of the building envelope components). This contribution is based on this concept. In the framework of a master thesis, a number of prescriptive indicators were considered. These indicators were derived for a set of sample buildings. In a parallel effort, energy certificates (encompassing Key Performance Indicators KPIs) were calculated for the sample buildings. It is clear that the prescriptive indicators cannot act as a 1:1 replacement for KPIs in terms of a numeric value. However, their usefulness can be expressed by the relation of the prescriptive indicator and the corresponding KPIs of a building. Thus, the results of the described calculation efforts were ranked. Subsequently, the lists of buildings ranked by the different indicators were compared in order to identify prescriptive indicators, which result in the same or at least similar ranking as the normative key performance indicators. Within this contribution, the suggested prescriptive indicators, the sample buildings, and the results of the analysis are presented and discussed.

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Energy Efficient Reconfigurable Threshold Logic Circuit with Spintronic Devices

IEEE Transactions on Emerging Topics in Computing ◽

10.1109/tetc.2016.2633966 ◽

2017 ◽

Vol 5 (2) ◽

pp. 223-237 ◽

Cited By ~ 8

Author(s):

Zhezhi He ◽

Deliang Fan

Keyword(s):

Energy Efficient ◽

Logic Circuit ◽

Threshold Logic ◽

Spintronic Devices

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Persistent Active Longitudes in Sunspot Activity: Sun-as-a-Star Approach

Symposium - International Astronomical Union ◽

10.1017/s007418090018204x ◽

2004 ◽

Vol 219 ◽

pp. 128-132

Author(s):

S. V. Berdyugina ◽

I. G. Usoskin

Keyword(s):

Sunspot Group ◽

Active Regions ◽

Magnetic Activity ◽

Sunspot Activity ◽

Flip Flop ◽

The Past ◽

Highly Active ◽

Group Data ◽

Cool Stars ◽

The Mean

Using a new Sun-as-a-star approach we analyze sunspot group data for the past 120 years and reveal that sunspots are formed preferably in two persistent migrating active longitudes 180° apart. Their migration is determined by changes of the mean latitude of sunspots and the surface differential rotation. The two active regions periodically alternate being the dominant region with a period of about 3.7 years similar to the “flip-flop” phenomenon known in starspot activity. The fact that the Sun shows the same pattern of magnetic activity as highly active stars strengthens the solar paradigm for magnetic activity on cool stars.

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Sub-threshold logic circuit design using feedback equalization

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 ◽

10.7873/date2014.121 ◽

2014 ◽

Author(s):

Mahmoud Zangeneh ◽

Ajay Joshi

Keyword(s):

Circuit Design ◽

Logic Circuit ◽

Threshold Logic

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Memristive Threshold Logic Circuit Design of Fast Moving Object Detection

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2359801 ◽

2015 ◽

Vol 23 (10) ◽

pp. 2337-2341 ◽

Cited By ~ 19

Author(s):

Akshay Kumar Maan ◽

Dinesh Sasi Kumar ◽

Sherin Sugathan ◽

Alex Pappachen James

Keyword(s):

Object Detection ◽

Circuit Design ◽

Fast Moving ◽

Logic Circuit ◽

Moving Object Detection ◽

Moving Object ◽

Threshold Logic

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Flip-flop logic circuit based on fully solution-processed organic thin film transistor devices with reduced variations in electrical performance

Japanese Journal of Applied Physics ◽

10.7567/jjap.54.04dk03 ◽

2015 ◽

Vol 54 (4S) ◽

pp. 04DK03 ◽

Cited By ~ 13

Author(s):

Yasunori Takeda ◽

Yudai Yoshimura ◽

Faiz Adi Ezarudin Bin Adib ◽

Daisuke Kumaki ◽

Kenjiro Fukuda ◽

...

Keyword(s):

Thin Film ◽

Thin Film Transistor ◽

Logic Circuit ◽

Electrical Performance ◽

Organic Thin Film ◽

Organic Thin Film Transistor ◽

Solution Processed ◽

Flip Flop

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An Accumulator using Electron Tunneling Through Tunnel Junction

International Journal of Scientific Research in Science Engineering and Technology ◽

10.32628/ijsrset218512 ◽

2021 ◽

pp. 163-183

Author(s):

Dr. Anup Kumar Biswas

Keyword(s):

High Speed ◽

Electron Tunneling ◽

Low Cost ◽

Logic Gate ◽

Logic Gates ◽

Threshold Logic ◽

High Concentration ◽

Flip Flop ◽

Linear Threshold ◽

Parameter Values

Instead of an existing logical Technology, by using an emerging technology we will be able to make an electronic circuit with high speed, low cost, high concentration density, light in weight, reduced gate numbers and low power consumption. This technology is based on the linear threshold logic condition and electron-tunneling event. At the time of implementing a circuit, a multi-inputs but one-output based logic-node will be brought in our consideration. In this work, we have designed a 1-bit accumulator and then implemented it. To develop an accumulator, some small components like 2-input AND, 3-input AND, 3-input OR, 8-input OR, 9-input OR gate and above all a JK Flip-flop (for 1-bit) are to be collected and connected them in logical order to obtain the proper circuit. After verifying all their characteristics with the results obtained from the simulator, we have built a 1-bit accumulator. All the small components are provided in due places. They are analyzed, detected their threshold logic equations, shown their threshold logic gates (TLGs), tabulated their truth tables, drawn their input-output waveforms, given their respective circuits with exact parameter values. In the accumulator, there are nine control variables S1 through S9 in view of performing the operations (i) Addition, (ii) clear, (iii) complement, (iv) AND, (v) OR, (vi) XOR, (vii) Right-shift, (viii) Left-shift and (ix) increment with positive triggering clock pulses. Whether our present work’s circuits are faster or slower with respect to the similar circuits of CMOS based- and Single electron transistor (SET) based circuits are compared and observed that our TLG based circuits are faster than the CMOS and SET based circuits. The power consumed for tunneling event for a circuit is measured and sensed that it would remain in the range of 10meV to 250meV which is low. All the circuits we have presented in this work are of ‘generic multiple input threshold logic gate’ which is elaborately discussed.

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