Study on Crystallization Mechanism of GeSn Interlayer for Low Temperature Ge/Si Bonding

2021 ◽  
Author(s):  
Ziwei Wang ◽  
Ziqi Zhang ◽  
Donglin Huang ◽  
Shaoying Ke ◽  
Zongpei Li ◽  
...  
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Wafer Bonding ◽  
Photonic Integrated Circuits ◽  
High Strength ◽  
Activation Process ◽  
Low Temperature Bonding ◽  
Gesn Alloy ◽  
Interlayer Bonding ◽  
Si Wafer

Abstract Low temperature bonding technologies is necessary in next-generation photonic integrated circuits, such as flexible optoelectronic devices, low dark current Ge/Si devices and so on. Since Germanium-Tin (GeSn) alloy has lower crystallization temperature, in this work, amorphous GeSn with 5% Sn alloy by magnetron sputtering is introduced as an intermediate layer for wafer bonding innovatively. And high strength Ge/Si heterojunction with a crystal GeSn layer is realized without any surface activation process. Two mechanisms in the interlayer crystallization are put forward and substantiated experimentally and theoretically: 1) the a-GeSn turns to be poly-GeSn due to the induction of the c-Ge substrate. 2) Stress between Si wafer and interlayer due to thermal mismatch contributes to the crystallization. It is concluded that GeSn semiconductor interlayer bonding would be one of the potential technologies for bonding process.

Low-Temperature, Strong SiO2-SiO2 Covalent Wafer Bonding for III–V Compound Semiconductors-to-Silicon Photonic Integrated Circuits

2008 ◽  
Vol 37 (10) ◽  
pp. 1552-1559 ◽  
Author(s):  
Di Liang ◽  
Alexander W. Fang ◽  
Hyundai Park ◽  
Tom E. Reynolds ◽  
Keith Warner ◽  
...  
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Wafer Bonding ◽  
Photonic Integrated Circuits ◽  
Compound Semiconductors ◽  
Silicon Photonic

Low-temperature Au–Si wafer bonding

2010 ◽  
Vol 20 (9) ◽  
pp. 095014 ◽  
Author(s):  
Errong Jing ◽  
Bin Xiong ◽  
Yuelin Wang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer

TLP Bonding Technologies for Micro Joining and 3D Packaging

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 001221-001252 ◽  
Author(s):  
Kei Murayama ◽  
Mitsuhiro Aizawa ◽  
Mitsutoshi Higashi
Keyword(s):  
High Temperature ◽  
Melting Point ◽  
Low Temperature ◽  
Wafer Bonding ◽  
Bonding Process ◽  
Tlp Bonding ◽  
Hermetic Sealing ◽  
Low Temperature Bonding ◽  
Free Material ◽  
Bonding Technique

The bonding technique for High density Flip Chip(F.C.) packages requires a low temperature and a low stress process to have high reliability of the micro joining ,especially that for sensor MEMS packages requires hermetic sealing so as to ensure their performance. The Transient Liquid Phase (TLP) bonding, that is a kind of diffusion bonding is a technique that connects the low melting point material such as Indium to the higher melting point metal such as Gold by the isothermal solidification and high-melting-point intermetallic compounds are formed. Therefore, it is a unique joining technique that can achieve not only the low temperature bonding and also the high temperature reliability. The Gold-Indium TLP bonding technique can join parts at 180 degree C and after bonding the melting point of the junction is shifted to more than 495 degree C, therefore itfs possible to apply the low temperature bonding lower than the general use as a lead free material such as a SAC and raise the melting point more than AuSn solder which is used for the high temperature reliability usage. Therefore, the heat stress caused by bonding process can be expected to be lowered. We examined wafer bonding and F.C bonding plus annealing technique by using electroplated Indium and Gold as a joint material. We confirmed that the shear strength obtained at the F.C. bonding plus anneal technique was equal with that of the wafer bonding process. Moreover, it was confirmed to ensure sufficient hermetic sealing in silicon cavity packages that had been bonded at 180 degree C. And the difference of the thermal stress that affect to the device by the bonding process was confirmed. In this paper, we report on various possible application of the TLP bonding.

Low-Temperature Indium Bonding for MEMS Devices

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 002543-002566
Author(s):  
Daniel Harris ◽  
Robert Dean ◽  
Ashish Palkar ◽  
Mike Palmer ◽  
Charles Ellis ◽  
...  
Keyword(s):  
Electron Beam ◽  
Low Temperature ◽  
Room Temperature ◽  
Electron Beam Evaporation ◽  
Mems Devices ◽  
Microfabrication Technique ◽  
Mems Device ◽  
Low Temperature Bonding ◽  
Bonding Technique ◽  
Si Wafer

Low–temperature bonding techniques are of great importance in fabricating MEMS devices, and especially for sealing microfluidic MEMS devices that require encapsulation of a liquid. Although fusion, thermocompression, anodic and eutectic bonding have been successfully used in fabricating MEMS devices, they require temperatures higher than the boiling point of commonly used fluids in MEMS devices such as water, alcohols and ammonia. Although adhesives and glues have been successfully used in this application, they may contaminate the fluid in the MEMS device or the fluid may prevent suitable bonding. Indium (In) possesses the unusual property of being cold weldable. At room temperature, two sufficiently clean In surfaces can be cold welded by bringing them into contact with sufficient force. The bonding technique developed here consists of coating and patterning one Si wafer with 500A Ti, 300A Ni and 1 μm In through electron beam evaporation. A second wafer is metallized and patterned with a 500A Ti and 1 μm Cu by electron beam evaporation and then electroplated with 10 μm of In. Before the In coated sections are brought into contact, the In surfaces are chemically cleaned to remove indium-oxide. Then the sections are brought into contact and held under sufficient pressure to cold weld the sections together. Using this technique, MEMS water-filled and mercury-filled microheatpipes were successfully fabricated and tested. Additionally, this microfabrication technique is useful for fabricating other types of MEMS devices that are limited to low-temperature microfabrication processes.

Low Temperature Direct Cu-Cu Immersion Bonding for 3D Integration

2009 ◽  
Vol 1156 ◽  
Author(s):  
Rahul Agarwal ◽  
Wouter Ruythooren
Keyword(s):  
Citric Acid ◽  
Low Temperature ◽  
Bonding Temperature ◽  
Atmospheric Condition ◽  
High Strength ◽  
Bonding Process ◽  
3D Integration ◽  
Temperature And Pressure ◽  
Low Temperature Bonding

AbstractHigh yielding and high strength Cu-Cu thermo-compression bonds have been obtained at temperatures as low as 175°C. Plated Cu bumps are used for bonding, without any surface planarization step or plasma treatment, and bonding is performed at atmospheric condition. In this work the 25μm diameter bumps are used at a bump pitch of 100μm and 40μm. Low temperature bonding is achieved by using immersion bonding in citric acid. Citric acid provides in-situ cleaning of the Cu surface during the bonding process. The daisy chain electrical bonding yield ranges from 84%-100% depending on the bonding temperature and pressure.

150 mm InP-to-Silicon Direct Wafer Bonding for Silicon Photonic Integrated Circuits

2019 ◽  
Vol 16 (8) ◽  
pp. 235-241 ◽  
Author(s):  
Di Liang ◽  
Alexander Fang ◽  
Douglas Oakley ◽  
Antonio Napoleone ◽  
David Chapman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Wafer Bonding ◽  
Photonic Integrated Circuits ◽  
Silicon Photonic ◽  
Direct Wafer Bonding

Sequential Activation Process of oxygen RIE and nitrogen Radical for LiTaO3 and Si Wafer Bonding

2019 ◽  
Vol 3 (6) ◽  
pp. 91-98 ◽  
Author(s):  
Yoshikaju Zikuhara ◽  
Eiji Higurashi ◽  
Noboru Tamura ◽  
T. Suga
Keyword(s):  
Wafer Bonding ◽  
Activation Process ◽  
Sequential Activation ◽  
Nitrogen Radical ◽  
Si Wafer

Low-temperature Si/Si wafer bonding using boride-treated surface

2009 ◽  
Author(s):  
Hailan Song ◽  
Hui Huang ◽  
Xiaomin Ren ◽  
Wenjuan Wang ◽  
Yongqing Huang
Keyword(s):  
Low Temperature ◽  
Wafer Bonding ◽  
Si Wafer
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