Performance Evaluation, Comparison and Identification of Efficient Hypercube Interconnection Networks

Author(s):  
Karthik K ◽  
Sudarson Jena ◽  
Venu Gopal T

Abstract A Multiprocessor is a system with at least two processing units sharing access to memory. The principle goal of utilizing a multiprocessor is to process the undertakings all the while and support the system’s performance. An Interconnection Network interfaces the various handling units and enormously impacts the exhibition of the whole framework. Interconnection Networks, also known as Multi-stage Interconnection Networks, are node-to-node links in which each node may be a single processor or a group of processors. These links transfer information from one processor to the next or from the processor to the memory, allowing the task to be isolated and measured equally. Hypercube systems are a kind of system geography used to interconnect various processors with memory modules and precisely course the information. Hypercube systems comprise of 2n nodes. Any Hypercube can be thought of as a graph with nodes and edges, where a node represents a processing unit and an edge represents a connection between the processors to transmit. Degree, Speed, Node coverage, Connectivity, Diameter, Reliability, Packet loss, Network cost, and so on are some of the different system scales that can be used to measure the performance of Interconnection Networks. A portion of the variations of Hypercube Interconnection Networks include Hypercube Network, Folded Hypercube Network, Multiple Reduced Hypercube Network, Multiply Twisted Cube, Recursive Circulant, Exchanged Crossed Cube Network, Half Hypercube Network, and so forth. This work assesses the performing capability of different variations of Hypercube Interconnection Networks. A group of properties is recognized and a weight metric is structured utilizing the distinguished properties to assess the performance exhibition. Utilizing this weight metric, the performance of considered variations of Hypercube Interconnection Networks is evaluated and summed up to recognize the effective variant. A compact survey of a portion of the variations of Hypercube systems, geographies, execution measurements, and assessment of the presentation are examined in this paper. Degree and Diameter are considered to ascertain the Network cost. On the off chance that Network Cost is considered as the measurement to assess the exhibition, Multiple Reduced Hypercube stands ideal with its lower cost. Notwithstanding it, on the off chance that we think about some other properties/ scales/metrics to assess the performance, any variant other than MRH may show considerably more ideal execution. The considered properties probably won't be ideally adequate to assess the effective performance of Hypercube variations in all respects. On the off chance that a sensibly decent number of properties are utilized to assess the presentation, a proficient variation of Hypercube Interconnection Network can be distinguished for a wide scope of uses. This is the inspiration to do this research work.

2020 ◽  
Vol 31 (02) ◽  
pp. 233-252
Author(s):  
Yuejuan Han ◽  
Lantao You ◽  
Cheng-Kuan Lin ◽  
Jianxi Fan

The topology properties of multi-processors interconnection networks are important to the performance of high performance computers. The hypercube network [Formula: see text] has been proved to be one of the most popular interconnection networks. The [Formula: see text]-dimensional locally twisted cube [Formula: see text] is an important variant of [Formula: see text]. Fault diameter and wide diameter are two communication performance evaluation parameters of a network. Let [Formula: see text]), [Formula: see text] and [Formula: see text] denote the diameter, the [Formula: see text] fault diameter and the wide diameter of [Formula: see text], respectively. In this paper, we prove that [Formula: see text] if [Formula: see text] is an odd integer with [Formula: see text], [Formula: see text] if [Formula: see text] is an even integer with [Formula: see text].


2017 ◽  
Vol 17 (02) ◽  
pp. 1750005 ◽  
Author(s):  
GAURAV KHANNA ◽  
RAJESH MISHRA ◽  
S. K. CHATURVEDI

Advancement in technology has resulted in increased computing power with the use of multiple processors within a system. These multiple processors need to communicate with each other and with memory modules. Multistage Interconnection Networks (MINs) provide a communication medium in such multi-processor systems by interconnecting a number of processors and memory modules. Besides, MINs also provide a cost effective substitute to costly crossbars in parallel computers and switching systems in telephone industry. This paper introduces two new fault-tolerant MINs named as Shuffle Exchange Gamma Interconnection Networks (SEGIN-1 and SEGIN-2). SEGIN-1 and SEGIN-2 can be obtained by altering Shuffle Exchange Network with one extra stage (SEN+) and provide two disjoint paths similar to it. Performance of SEGIN-1 and SEGIN-2 has been evaluated in terms of alternative paths, disjoint paths, reliability and hardware cost, and is compared with some very famous MINs like Shuffle Exchange Network (SEN), Shuffle Exchange Network with one extra stage (SEN+), Shuffle Exchange Network with two extra stage (SEN+2), Extra Stage Cube (ESC) and Gamma Interconnection Network (GIN). Results suggest that SEGINs surpass all the compared networks; hence, the proposed designs seem to be suitable for implementing practical interconnection networks.


Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 913 ◽  
Author(s):  
Sirine Mnejja ◽  
Yassine Aydi ◽  
Mohamed Abid ◽  
Salvatore Monteleone ◽  
Vincenzo Catania ◽  
...  

The Network-on-Chip (NoC) paradigm emerged as a viable solution to provide an efficient and scalable communication backbone for next-generation Multiprocessor Systems-on-Chip. As the number of integrated cores keeps growing, alternatives to the traditional multi-hop wired NoCs, such as wireless Networks-on-Chip (WiNoCs), have been proposed to provide long-range communications in a single hop. In this work, we propose and analyze the integration of the Delta Multistage Interconnection Network (MINs) as a backbone for wireless-enabled NoCs. After extending the well-known Noxim platform to implement a cycle-accurate model of a wireless Delta MIN, we perform a comprehensive set of SystemC simulations to analyze how wireless-augmented Delta MINs can potentially lead to an improvement in both average delay and saturation. Further, we compare the results obtained with traditional mesh-based topologies, reporting energy profiles that show an overall energy cost reduced on both wired/wireless scenarios.


Author(s):  
Fu-qiang Chen ◽  
Zhi-xin Gao ◽  
Jin-yuan Qian ◽  
Zhi-jiang Jin

In this paper, a new high multi-stage pressure reducing valve (HMSPRV) is proposed. The main advantages include reducing noise and vibration, reducing energy consumption and dealing with complex conditions. As a new high pressure reducing valve, its flow characteristics need to be investigated. For that the valve opening has a great effect on steam flow, pressure reduction and energy consumption, thus different valve openings are taken as the research points to investigate the flow characteristics. The analysis is conducted from four aspects: pressure, velocity, temperature fields and energy consumption. The results show that valve opening has a great effect on flow characteristics. No matter for pressure, velocity or temperature field, the changing gradient mainly reflects at those throttling components for all valve openings. For energy consumption, in the study of turbulent dissipation rate, it can be found that the larger of valve opening, the larger of energy consumption. It can be concluded that the new high multi-stage pressure reducing valve works well under complex conditions. This study can provide technological support for achieving pressure regulation, and benefit the further research work on energy saving and multi-stage design of pressure reducing devices.


2002 ◽  
Vol 03 (01n02) ◽  
pp. 49-65 ◽  
Author(s):  
NADER F. MIR

A thorough routing analysis of a switching network called the spherical switching network for high-speed applications is presented in this paper. The spherical switching network has a cyclic, regular, and highly expandable structure with a simple self-routing scheme. The network is constructed with fixed-size switch elements regardless of the size of the network. Each switch element consists of a carefully-selected sized 9 input/output crossbar and a local controller. One of the nine pairs of links is external and carries the external traffic, and the other eight pairs are internal. The contention resolution in each switch element is based on deflection of losing packets and incremental priority of packets. The switch elements do not utilize any buffering within the network. The analysis shows that this network clearly outperforms typical interconnection networks currently being deployed in practical switches and routers such as Banyan network. In order to keep the number of deflections low, each incoming external link is connected to a buffer with flow control capabilities. Due to the special arrangement of interconnections in the network, a much larger number of shortest paths between each pair of source/destination exists. The related analysis for finding the number of hops and shortest paths appear in this paper.


2018 ◽  
Vol 29 (06) ◽  
pp. 995-1001 ◽  
Author(s):  
Shuli Zhao ◽  
Weihua Yang ◽  
Shurong Zhang ◽  
Liqiong Xu

Fault tolerance is an important issue in interconnection networks, and the traditional edge connectivity is an important measure to evaluate the robustness of an interconnection network. The component edge connectivity is a generalization of the traditional edge connectivity. The [Formula: see text]-component edge connectivity [Formula: see text] of a non-complete graph [Formula: see text] is the minimum number of edges whose deletion results in a graph with at least [Formula: see text] components. Let [Formula: see text] be an integer and [Formula: see text] be the decomposition of [Formula: see text] such that [Formula: see text] and [Formula: see text] for [Formula: see text]. In this note, we determine the [Formula: see text]-component edge connectivity of the hypercube [Formula: see text], [Formula: see text] for [Formula: see text]. Moreover, we classify the corresponding optimal solutions.


2021 ◽  
Vol 17 (11) ◽  
pp. 155014772110331
Author(s):  
Jung-hyun Seo ◽  
HyeongOk Lee

One method to create a high-performance computer is to use parallel processing to connect multiple computers. The structure of the parallel processing system is represented as an interconnection network. Traditionally, the communication links that connect the nodes in the interconnection network use electricity. With the advent of optical communication, however, optical transpose interconnection system networks have emerged, which combine the advantages of electronic communication and optical communication. Optical transpose interconnection system networks use electronic communication for relatively short distances and optical communication for long distances. Regardless of whether the interconnection network uses electronic communication or optical communication, network cost is an important factor among the various measures used for the evaluation of networks. In this article, we first propose a novel optical transpose interconnection system–Petersen-star network with a small network cost and analyze its basic topological properties. Optical transpose interconnection system–Petersen-star network is an undirected graph where the factor graph is Petersen-star network. OTIS–PSN n has the number of nodes 102n, degree n+3, and diameter 6 n − 1. Second, we compare the network cost between optical transpose interconnection system–Petersen-star network and other optical transpose interconnection system networks. Finally, we propose a routing algorithm with a time complexity of 6 n − 1 and a one-to-all broadcasting algorithm with a time complexity of 2 n − 1.


2000 ◽  
Vol 01 (02) ◽  
pp. 115-134 ◽  
Author(s):  
TSENG-KUEI LI ◽  
JIMMY J. M. TAN ◽  
LIH-HSING HSU ◽  
TING-YI SUNG

Given a shortest path routing algorithm of an interconnection network, the edge congestion is one of the important factors to evaluate the performance of this algorithm. In this paper, we consider the twisted cube, a variation of the hypercube with some better properties, and review the existing shortest path routing algorithm8. We find that its edge congestion under the routing algorithm is high. Then, we propose a new shortest path routing algorithm and show that our algorithm has optimum time complexity O(n) and optimum edge congestion 2n. Moreover, we calculate the bisection width of the twisted cube of dimension n.


1998 ◽  
Vol 09 (01) ◽  
pp. 25-37 ◽  
Author(s):  
THOMAS J. CORTINA ◽  
ZHIWEI XU

We present a family of interconnection networks named the Cube-Of-Rings (COR) networks along with their basic graph-theoretic properties. Aspects of group graph theory are used to show the COR networks are symmetric and optimally fault tolerant. We present a closed-form expression of the diameter and optimal one-to-one routing algorithm for any member of the COR family. We also discuss the suitability of the COR networks as the interconnection network of scalable parallel computers.


2020 ◽  
Vol 20 (03) ◽  
pp. 2050011
Author(s):  
JUTAO ZHAO ◽  
SHIYING WANG

The connectivity and diagnosability of a multiprocessor system or an interconnection network is an important research topic. The system and interconnection network has a underlying topology, which usually presented by a graph. As a famous topology structure of interconnection networks, the n-dimensional leaf-sort graph CFn has many good properties. In this paper, we prove that (a) the restricted edge connectivity of CFn (n ≥ 3) is 3n − 5 for odd n and 3n − 6 for even n; (b) CFn (n ≥ 5) is super restricted edge-connected; (c) the nature diagnosability of CFn (n ≥ 4) under the PMC model is 3n − 4 for odd n and 3n − 5 for even n; (d) the nature diagnosability of CFn (n ≥ 5) under the MM* model is 3n − 4 for odd n and 3n − 5 for even n.


Sign in / Sign up

Export Citation Format

Share Document