ScienceGate
Advanced Search
Author Search
Journal Finder
Blog
Sign in / Sign up
ScienceGate
Search
Author Search
Journal Finder
Blog
Sign in / Sign up
High-density MOM capacitor array with novel mortise-tenon structure for low-power SAR ADC
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
◽
10.23919/date.2017.7927277
◽
2017
◽
Author(s):
Nai-Chen Chen
◽
Pang-Yen Chou
◽
Helmut Graeb
◽
Mark Po-Hung Lin
Keyword(s):
Low Power
◽
High Density
◽
Sar Adc
◽
Capacitor Array
Download Full-text
Related Documents
Cited By
References
Low power consumption and low area capacitor array for 16-bit 1-MS/s SAR ADC
2018 IEEE 3rd Advanced Information Technology, Electronic and Automation Control Conference (IAEAC)
◽
10.1109/iaeac.2018.8577797
◽
2018
◽
Author(s):
Hongyi Wang
◽
Siyuan Wang
◽
Yidong Yuan
◽
Guohe Zhang
Keyword(s):
Power Consumption
◽
Low Power
◽
Sar Adc
◽
Low Power Consumption
◽
Low Area
◽
Capacitor Array
Download Full-text
A Low Power Reference Voltage Buffer and High Density Unit capacitor in a 12b 200MS/s SAR ADC
2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
◽
10.1109/apccas50809.2020.9301670
◽
2020
◽
Author(s):
Wenbin He
◽
Ziwei Li
◽
Fan Ye
◽
Junyan Ren
Keyword(s):
Low Power
◽
High Density
◽
Sar Adc
◽
Reference Voltage
◽
Density Unit
Download Full-text
5.2 Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applications
2019 IEEE International Solid- State Circuits Conference - (ISSCC)
◽
10.1109/isscc.2019.8662306
◽
2019
◽
Cited By ~ 9
Author(s):
Kyojin D. Choo
◽
Li Xu
◽
Yejoong Kim
◽
Ji-Hwan Seol
◽
Xiao Wu
◽
...
Keyword(s):
Low Power
◽
Energy Efficient
◽
Charge Injection
◽
Cmos Image Sensor
◽
Image Sensor
◽
Low Noise
◽
Sar Adc
◽
Iot Applications
◽
Capacitor Array
Download Full-text
A low power consumption 10-bit rail-to-rail SAR ADC using a C-2C capacitor array
2008 IEEE International Conference on Electron Devices and Solid-State Circuits
◽
10.1109/edssc.2008.4760721
◽
2008
◽
Cited By ~ 16
Author(s):
Hoonki Kim
◽
YoungJae Min
◽
Yonghwan Kim
◽
Soowon Kim
Keyword(s):
Power Consumption
◽
Low Power
◽
Sar Adc
◽
Low Power Consumption
◽
Capacitor Array
◽
Rail To Rail
Download Full-text
A low power switching method with variable comparator reference voltage and split capacitor array for SAR ADC
2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)
◽
10.1109/edssc.2016.7785287
◽
2016
◽
Author(s):
Xiaoyong He
◽
Junliang He
◽
Min Cai
◽
Zhaoxia Jing
Keyword(s):
Low Power
◽
Sar Adc
◽
Reference Voltage
◽
Power Switching
◽
Capacitor Array
◽
Split Capacitor
◽
Switching Method
Download Full-text
Design of a high sensitivity and low power ultrasound receiver with a high-resolution SAR ADC for photoacoustic sensing and imaging
10.32657/10356/144400
◽
2020
◽
Author(s):
◽
Chuanshi Yang
Keyword(s):
High Resolution
◽
Low Power
◽
High Sensitivity
◽
Sar Adc
◽
Power Ultrasound
Download Full-text
Voltage-Gate-Assisted Spin-Orbit-Torque Magnetic Random-Access Memory for High-Density and Low-Power Embedded Applications
Physical Review Applied
◽
10.1103/physrevapplied.15.064015
◽
2021
◽
Vol 15
(6)
◽
Author(s):
Y.C. Wu
◽
K. Garello
◽
W. Kim
◽
M. Gupta
◽
M. Perumkunnil
◽
...
Keyword(s):
Low Power
◽
Random Access
◽
Random Access Memory
◽
High Density
◽
Spin Orbit
◽
Access Memory
◽
Magnetic Random Access Memory
◽
Embedded Applications
◽
Voltage Gate
Download Full-text
27.2 14.1-ENOB 184.9dB-FoM Capacitor-Array-Assisted Cascaded Charge-Injection SAR ADC
2021 IEEE International Solid- State Circuits Conference (ISSCC)
◽
10.1109/isscc42613.2021.9365863
◽
2021
◽
Author(s):
Kyojin Choo
◽
Hyochan An
◽
Dennis Sylvester
◽
David Blaauw
Keyword(s):
Charge Injection
◽
Sar Adc
◽
Capacitor Array
Download Full-text
Capacitor-less, Long-Retention (>400s) DRAM Cell Paving the Way towards Low-Power and High-Density Monolithic 3D DRAM
2020 IEEE International Electron Devices Meeting (IEDM)
◽
10.1109/iedm13553.2020.9371900
◽
2020
◽
Author(s):
A. Belmonte
◽
H. Oh
◽
N. Rassoul
◽
G.L. Donadio
◽
J. Mitard
◽
...
Keyword(s):
Low Power
◽
High Density
◽
The Way
Download Full-text
Low Power 10-BIT 8MS/s Asynchronous SAR ADC with Wake-up and Sample Logic for BLE Application
2020 International Conference on Electronics, Information, and Communication (ICEIC)
◽
10.1109/iceic49074.2020.9051214
◽
2020
◽
Author(s):
Deeksha Verma
◽
Khuram Shehzad
◽
Sung Jin Kim
◽
Kang-Yoon Lee
Keyword(s):
Low Power
◽
Sar Adc
◽
Asynchronous Sar
Download Full-text
Sign in / Sign up
Close
Export Citation Format
Close
Share Document
Close