Failure and Stress Analysis of Cu TSVs Using GHz-Scanning Acoustic Microscopy and Scanning Infrared Polariscopy

2015 ◽  
Author(s):  
Ingrid De Wolf ◽  
Ahmad Khaled ◽  
Martin Herms ◽  
Matthias Wagner ◽  
Tatjana Djuric ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Stress Analysis ◽  
Rayleigh Waves ◽  
Acoustic Microscopy ◽  
Scanning Acoustic Microscopy ◽  
Through Silicon Vias ◽  
Stress Anisotropy ◽  
Silicon Vias ◽  
Ic Technology ◽  
Detection Of Defects

Abstract This paper discusses the application of two different techniques for failure analysis of Cu through-silicon vias (TSVs), used in 3D stacked-IC technology. The first technique is GHz Scanning Acoustic Microscopy (GHz- SAM), which not only allows detection of defects like voids, cracks and delamination, but also the visualization of Rayleigh waves. GHz-SAM can provide information on voids, delamination and possibly stress near the TSVs. The second is a reflection-based photoelastic technique (SIREX), which is shown to be very sensitive to stress anisotropy in the Si near TSVs and as such also to any defect affecting this stress, such as delamination and large voids.

Failure Analysis of Broken Stitch Bonds in TSSOP Packages Using Scanning Acoustic Microscopy (SAM) and Time Domain Reflectometry (TDR)

2004 ◽  
Author(s):  
Bilal Abd-AlRahman ◽  
Corey Lewis ◽  
Todd Simons
Keyword(s):  
Failure Analysis ◽  
Mechanical Stress ◽  
Time Domain ◽  
Open Circuit ◽  
Time Domain Reflectometry ◽  
Acoustic Microscopy ◽  
Scanning Acoustic Microscopy ◽  
Root Cause ◽  
Analysis Application

Abstract A failure analysis application utilizing scanning acoustic microscopy (SAM) and time domain reflectometry (TDR) for failure analysis has been developed to isolate broken stitch bonds in thin shrink small outline package (TSSOP) devices. Open circuit failures have occurred in this package due to excessive bending of the leads during assembly. The tools and their specific application to this technique as well as the limitations of C-SAM, TDR and radiographic analyses are discussed. By coupling C-SAM and TDR, a failure analyst can confidently determine whether the cause of an open circuit in a TSSOP package is located at the stitch bond. The root cause of the failure was determined to be abnormal mechanical stress placed on the pins during the lead forming operation. While C-SAM and TDR had proven useful in the analysis of TSSOP packages, it can potentially be expanded to other wire-bonded packages.

Characterization and Failure Analysis of Wafer Bonded Devices and Unfilled Through-Silicon-Vias (TSVs)

2008 ◽  
Author(s):  
C. Cassidy ◽  
J. Kraft ◽  
G. Koppitsch ◽  
E. Brandlhofer ◽  
M. Steiner ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Semiconductor Devices ◽  
3D Integration ◽  
Through Silicon Vias ◽  
Silicon Vias

Abstract This paper is concerned with characterization and failure analysis challenges posed by 3D integration of semiconductor devices, with a particular focus on wafer bonded components and Through Silicon Vias (TSV). Requirements for sample preparation are discussed, along with advantages and limitations exhibited by various different techniques. Analysis examples with real devices are presented, along with successful sample preparation solutions enabled by a precision polishing toolset.

Scanning Acoustic Microscopy for Solder Joint Failure Analysis and Design Improvements

2008 ◽  
Author(s):  
Ramesh Varma ◽  
Jeffrey Bartolovitch ◽  
Victor Brzozowski ◽  
Carl Sokolowski
Keyword(s):  
Solder Joint ◽  
Failure Analysis ◽  
Thermal Cycling ◽  
Electrical Power ◽  
Acoustic Microscopy ◽  
Scanning Acoustic Microscopy ◽  
Joint Failure ◽  
Analysis And Design ◽  
Cte Mismatch ◽  
Bond Pads

Abstract This paper reports using Scanning Acoustic Microscopy for solder joint failure analysis and process and design improvements. There are reliability concerns associated with solder voids or non-wetting of the solder to the bond pads which is particularly important for higher electrical power or temperature applications. Defects in solder can also occur and grow during operation and thermal cycling. Sonoscan is an attractive non-destructive test to characterize solder joints and is often used to study the growth of defects during life test simulations. X-ray imaging cannot identify very small defects, particularly non-wetting and delamination because of poor resolution. The instrument used in this study was a CSAM (C-Mode Scanning Acoustic Microscopy) operating in reflection mode at 30-100 MHz. We have identified voids inherent in the solder layer as well as delamination at the package to solder and solder to heat-sink interfaces. C-SAM results confirmed that the delamination was caused by CTE mismatch of the materials as well as the mechanical stresses caused by higher level package integration and module assemblies. Thermal cycling studies have shown that typically the voids do not grow whereas delamination does. These results were used to improve thermal heat-sinking and product reliability by minimizing defects in solder joint by changes in process and mechanical designs.

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