Failure Analysis of Broken Stitch Bonds in TSSOP Packages Using Scanning Acoustic Microscopy (SAM) and Time Domain Reflectometry (TDR)

Acoustic Microscopy ◽

Root Cause ◽

Analysis Application

Abstract A failure analysis application utilizing scanning acoustic microscopy (SAM) and time domain reflectometry (TDR) for failure analysis has been developed to isolate broken stitch bonds in thin shrink small outline package (TSSOP) devices. Open circuit failures have occurred in this package due to excessive bending of the leads during assembly. The tools and their specific application to this technique as well as the limitations of C-SAM, TDR and radiographic analyses are discussed. By coupling C-SAM and TDR, a failure analyst can confidently determine whether the cause of an open circuit in a TSSOP package is located at the stitch bond. The root cause of the failure was determined to be abnormal mechanical stress placed on the pins during the lead forming operation. While C-SAM and TDR had proven useful in the analysis of TSSOP packages, it can potentially be expanded to other wire-bonded packages.

Evaluation on the Effectiveness of Removal VSON Package from FR4 Substrate Board

10.31399/asm.cp.istfa2018p0047 ◽

2018 ◽

Author(s):

Gan Sue Yin

Keyword(s):

Environmental Stress ◽

Failure Analysis ◽

Acoustic Microscopy ◽

Soldering Process ◽

Root Cause ◽

Non Destructive

Abstract This paper is focused on the de-soldering process on VSON package which was mounted on FR4 substrate board after being subjected to environmental stress. Abnormalities were found at package level during Scanning Acoustic Microscopy (SAM) inspection which is considered to be one of the non-destructive failure analysis processes. Root cause finding involved the investigation of the de-soldering equipment which is suspected to be one of the culprits to contribute to the defect during de-soldering process.

ISTFA 2001: Conference Proceedings from the 27th International Symposium for Testing and Failure Analysis ◽

Super-Conducting Quantum Interference Device Technique: 3-D Localization of a Short within a Flip Chip Assembly

10.31399/asm.cp.istfa2001p0069 ◽

2001 ◽

Author(s):

Kendall Scott Wills ◽

Omar Diaz de Leon ◽

Kartik Ramanujachar ◽

Charles P. Todd

Keyword(s):

Form Factor ◽

Failure Analysis ◽

Time Domain ◽

Quantum Interference ◽

Flip Chip ◽

Interfacial Region ◽

Precise Localization ◽

Super Conducting ◽

Accuracy Of Measurement

Abstract In the current generations of devices the die and its package are closely integrated to achieve desired performance and form factor. As a result, localization of continuity failures to either the die or the package is a challenging step in failure analysis of such devices. Time Domain Reflectometry [1] (TDR) is used to localize continuity failures. However the accuracy of measurement with TDR is inadequate for effective localization of the failsite. Additionally, this technique does not provide direct 3-Dimenstional information about the location of the defect. Super-conducting Quantum Interference Device (SQUID) Microscope is useful in localizing shorts in packages [2]. SQUID microscope can localize defects to within 5um in the X and Y directions and 35um in the Z direction. This accuracy is valuable in precise localization of the failsite within the die, package or the interfacial region in flipchip assemblies.

ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis ◽

Time Domain Reflectometry Technique for Failure Analysis

10.31399/asm.cp.istfa2004p0616 ◽

2004 ◽

Author(s):

Teoh King Long ◽

Ko Yin Fern

Keyword(s):

Failure Analysis ◽

Time Domain ◽

Fault Isolation ◽

Reference Plane ◽

First Case ◽

Main Emphasis ◽

Plastic Ball ◽

Solder Balls ◽

Non Destructive

Abstract In time domain reflectometry (TDR), the main emphasis lies on the reflected waveform. Poor probing contact is one of the common problems in getting an accurate waveform. TDR probe normalization is essential before measuring any TDR waveforms. The advantages of normalization include removal of test setup errors in the original test pulse and the establishment of a measurement reference plane. This article presents two case histories. The first case is about a Plastic Ball Grid Array package consisting of 352 solder balls where the open failure mode was encountered at various terminals after reliability assessment. In the second, a three-digit display LED suspected of an electrical short failure was analyzed using TDR as a fault isolation tool. TDR has been successfully used to perform non-destructive fault isolation in assisting the routine failure analysis of open and short failure. It is shown to be accurate and reduces the time needed to identify fault locations.

ISTFA 2015: Conference Proceedings from the 41st International Symposium for Testing and Failure Analysis ◽

Failure and Stress Analysis of Cu TSVs Using GHz-Scanning Acoustic Microscopy and Scanning Infrared Polariscopy

10.31399/asm.cp.istfa2015p0124 ◽

2015 ◽

Author(s):

Ingrid De Wolf ◽

Ahmad Khaled ◽

Martin Herms ◽

Matthias Wagner ◽

Tatjana Djuric ◽

...

Keyword(s):

Failure Analysis ◽

Stress Analysis ◽

Rayleigh Waves ◽

Acoustic Microscopy ◽

Through Silicon Vias ◽

Stress Anisotropy ◽

Silicon Vias ◽

Ic Technology ◽

Detection Of Defects

Abstract This paper discusses the application of two different techniques for failure analysis of Cu through-silicon vias (TSVs), used in 3D stacked-IC technology. The first technique is GHz Scanning Acoustic Microscopy (GHz- SAM), which not only allows detection of defects like voids, cracks and delamination, but also the visualization of Rayleigh waves. GHz-SAM can provide information on voids, delamination and possibly stress near the TSVs. The second is a reflection-based photoelastic technique (SIREX), which is shown to be very sensitive to stress anisotropy in the Si near TSVs and as such also to any defect affecting this stress, such as delamination and large voids.

2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) ◽

Failure analysis of LSI interconnection by terahertz time-domain reflectometry

10.1109/ipfa.2016.7564290 ◽

2016 ◽

Cited By ~ 3

Author(s):

Masaichi Hashimoto ◽

Takanori Okada ◽

Shigeki Nishina ◽

Tsuyoshi Ataka ◽

Makoto Shinohara ◽

...

Keyword(s):

Failure Analysis ◽

Time Domain ◽

Time Domain Reflectometry

2018 24rd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) ◽

Comparative Die-Attach Failure Analysis by Thermoreflectance, Infrared Thermography and Scanning Acoustic Microscopy

10.1109/therminic.2018.8593331 ◽

2018 ◽

Cited By ~ 1

Author(s):

Dan R. Wargulski ◽

Florian Loffler ◽

Daniel May ◽

Jens Heilmann ◽

Bernhard Wunderle ◽

...

Keyword(s):

Failure Analysis ◽

Infrared Thermography ◽

Acoustic Microscopy ◽

Die Attach

ISTFA 2000: Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis ◽

Time Domain Reflectometry as a Device Packaging Level Failure Analysis and Failure Localization Tool

10.31399/asm.cp.istfa2000p0285 ◽

2000 ◽

Author(s):

Damion T. Searls ◽

Anura Don ◽

Emilie Dy ◽

Deepak Goyal

Keyword(s):

Failure Analysis ◽

Time Domain ◽

Flip Chip ◽

Low Voltage ◽

Stress Tests ◽

X Ray ◽

Customer Returns ◽

Failure Location ◽

Electrical Connectivity

Abstract Detecting failure in electrical connectivity at the component packaging level is a major expenditure of the industry’s failure analysis (FA) resources. These package failures can result from material/manufacturing excursions, stress tests, and/or customer returns. However, many of the methods employed currently (such as X-ray or crosssectioning) can fall short in terms of throughput time, or success rate. Moreover, many FA techniques can be destructive and therefore leave the sample useless for subsequent tests. On the other hand, time domain reflectometry (TDR) can be used as a component packaging level FA tool which meets the needs of quickly, precisely, and non-destructively locating electrical connectivity problems in signal traces. Once the failure location has been pin pointed, other FA methods (X-ray, cross-section, etc.) can be used more easily to determine why the failure occurred. Since TDR testing involves no physical preparation, the sample will be completely intact for subsequent tests. TDR uses a low voltage, low current, and very short rise time voltage pulse to determine the impedance of a signal trace as a function of time. With a waveform of trace impedance versus time, not only can the presence of a failure be detected, but the distance along the trace to the anomaly can also be quickly determined. This paper presents TDR as a useful tool for package level failure analysis labs. The paper proposes one set of solutions for enabling effective TDR analysis (e.g., TDR test fixturing), and discusses some TDR methodologies for detecting and locating anomalies. The methodologies will be illustrated using three example cases that reflect some commonly used packaging technologies: Flip-Chip Organic Land Grid Array (FC-OLGA), Flip-Chip Pin Grid Array (FC-PGA), and Plastic Land Grid Array (PLGA).

ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis ◽

Scanning Acoustic Microscopy for Solder Joint Failure Analysis and Design Improvements

10.31399/asm.cp.istfa2008p0099 ◽

2008 ◽

Author(s):

Ramesh Varma ◽

Jeffrey Bartolovitch ◽

Victor Brzozowski ◽

Carl Sokolowski

Keyword(s):

Solder Joint ◽

Failure Analysis ◽

Thermal Cycling ◽

Electrical Power ◽

Acoustic Microscopy ◽

Joint Failure ◽

Analysis And Design ◽

Cte Mismatch ◽

Bond Pads

Abstract This paper reports using Scanning Acoustic Microscopy for solder joint failure analysis and process and design improvements. There are reliability concerns associated with solder voids or non-wetting of the solder to the bond pads which is particularly important for higher electrical power or temperature applications. Defects in solder can also occur and grow during operation and thermal cycling. Sonoscan is an attractive non-destructive test to characterize solder joints and is often used to study the growth of defects during life test simulations. X-ray imaging cannot identify very small defects, particularly non-wetting and delamination because of poor resolution. The instrument used in this study was a CSAM (C-Mode Scanning Acoustic Microscopy) operating in reflection mode at 30-100 MHz. We have identified voids inherent in the solder layer as well as delamination at the package to solder and solder to heat-sink interfaces. C-SAM results confirmed that the delamination was caused by CTE mismatch of the materials as well as the mechanical stresses caused by higher level package integration and module assemblies. Thermal cycling studies have shown that typically the voids do not grow whereas delamination does. These results were used to improve thermal heat-sinking and product reliability by minimizing defects in solder joint by changes in process and mechanical designs.