Conductive-AFM for Failure Analysis of Parametric Test Structures in Advanced Technology Development

Author(s):  
Chuan Zhang ◽  
Esther P.Y. Chen

Abstract A variety of parametric test structures were designed with the purpose of characterizing parameters tied to failure modes for specific structures, and the electrical test of the parametric test structures are typically conducted earlier inline, which could be months ahead of the functional test. Due to the unique advantages, conductive-atomic force microscopy (CAFM) was introduced to parametric test structure failure analysis during advanced technology development, and has been proven to be a powerful solution to many challenging failure analysis (FA) problems. This paper uses several case studies to illustrate how CAFM can be used to successfully localize defects in challenging parametric test structures that would otherwise be invisible with conventional FA techniques.

Author(s):  
Chuan Zhang ◽  
Oh Chong Khiam ◽  
Esther P.Y. Chen

Abstract The increase in complexity of process, structure, and design not only increases the amount of failure analysis (FA) work significantly, but also leads to more complicated failure modes. To meet the need of high success rate and fast throughput FA operation at the leading-edge nodes, novel FA techniques have to be explored and incorporated into the routine FA flow. One of the novel techniques incorporated into the presented scan logic FA flow is the conductive-atomic force microscopy (CAFM) technique. This paper demonstrates CAFM technique as a powerful and efficient solution for scan logic failure analysis at advanced technology nodes. Several failure modes in scan logic FA are used as examples to illustrate how CAFM provides excellent solutions to some of the very challenging FA problems. The gate to active short in nFET devices, resistive contact, and open defect on gate contact are some modes used.


Author(s):  
Lucile C. Teague Sheridan ◽  
Linda Conohan ◽  
Chong Khiam Oh

Abstract Atomic force microscopy (AFM) methods have provided a wealth of knowledge into the topographic, electrical, mechanical, magnetic, and electrochemical properties of surfaces and materials at the micro- and nanoscale over the last several decades. More specifically, the application of conductive AFM (CAFM) techniques for failure analysis can provide a simultaneous view of the conductivity and topographic properties of the patterned features. As CMOS technology progresses to smaller and smaller devices, the benefits of CAFM techniques have become apparent [1-3]. Herein, we review several cases in which CAFM has been utilized as a fault-isolation technique to detect middle of line (MOL) and front end of line (FEOL) buried defects in 20nm technologies and beyond.


Author(s):  
Chuan Zhang ◽  
Yinzhe Ma ◽  
Gregory Dabney ◽  
Oh Chong Khiam ◽  
Esther P.Y. Chen

Abstract Soft failures are among the most challenging yield detractors. They typically show test parameter sensitive characteristics, which would pass under certain test conditions but fail under other conditions. Conductive-atomic force microscopy (CAFM) emerged as an ideal solution for soft failure analysis that can balance the time and thoroughness. By inserting CAFM into the soft failure analysis flow, success rate of such type of analysis can be significantly enhanced. In this paper, a logic chain soft failure and a SRAM local bitline soft failure are used as examples to illustrate how this failure analysis methodology provides a powerful and efficient solution for soft failure analysis.


Author(s):  
Tom X. Tong ◽  
A. N. Erickson

Abstract Many of the standard techniques of Failure Analysis (FA) are breaking down or becoming less useful as feature sizes drop below 100nm. The tenth micron milestone appears to be a fundamental limitation to many common techniques. Use of Current Image-Atomic Force Microscopy (CI-AFM) combined with Atomic Force Probing (AFP) brings about a combination of technologies, which allow for extension of FA below the nano-scale.


Author(s):  
Kun Lin ◽  
Hang Zhang ◽  
Shey-shi Lu

Abstract Conductive Atomic Force Microscopy (C-AFM) is a useful tool for both electrical failure analysis (EFA) and physical failure analysis (PFA). In this paper, the root cause of a physical failure in an analysis image was verified from the evidence of two-dimensional AFM profile depth measurement. The other analysis technique, which is electrical parameter extraction by contacting I-V spectroscopy measurement, was also utilized to locate the possible defects. As a result, the failure mechanism was illustrated with an AFM topography image, which showed the silicon surface profile after removal of cobalt salicide (self-alignment silicide) by dilute HF. The vertical junction leakage path was identified with a C-AFM image.


Author(s):  
Wei-Shan Hu ◽  
Hui-Wen Yang ◽  
Yung-Sheng Huang

Abstract Integrated circuit complexity and density are continuously increasing with the rapid progress of advanced technology nodes. The density of wafer acceptance test (WAT) pattern is also becoming higher as the device continuing to shrink. Failure analysis (FA) techniques have been developed to improve the precision of defect isolation. A technique with more precise fault isolation capability is needed when the test pattern density increased. In this paper we have isolated faults within a dense high Rc array by using conductive atomic force microscopy (C-AFM). The fault sites in the array can be located efficiently with nano-scale precision. Point contact I-V measurements provide a quantitative comparison of the fault sites.


Author(s):  
Hung-Sung Lin ◽  
Wen-Tung Chang ◽  
Chia-Hsing Chao ◽  
Jesse Wang ◽  
Chang-Tan Lin ◽  
...  

Abstract Single column failure [1], one of the complex failure modes in SRAM is possibly induced by multiform defect types at diverse locations. Especially, soft single column failure is of great complexity. As physical failure analysis (PFA) is expensive and time-consuming, thorough electrical failure analysis (EFA) is needed to precisely localize the failing area to greater precision before PFA. The methodology involves testing for failure mode validation, understanding the circuit and using EFA tools such as IR-OBIRCH (InfraRed-Optical Beam Induced Resistance CHange) and MCT (MerCad Telluride, HgCdTe) for analysis. However, the electrical failure signature for soft single column failure is usually marginal, so additional techniques are needed to obtain accurate isolation and electrical characterization instead of blindly looking around. Thus in this discussion, we will also present the use of internal probing techniques like C-AFM [2] (Conductive Atomic Force Microscopy) and a nanoprobing technique [3] for characterizing electrical properties and understanding the root cause.


Author(s):  
Jon C. Lee ◽  
J. H. Chuang

Abstract As integrated circuits (IC) have become more complicated with device features shrinking into the deep sub-micron range, so the challenge of defect isolation has become more difficult. Many failure analysis (FA) techniques using optical/electron beam and scanning probe microscopy (SPM) have been developed to improve the capability of defect isolation. SPM provides topographic imaging coupled with a variety of material characterization information such as thermal, magnetic, electric, capacitance, resistance and current with nano-meter scale resolution. Conductive atomic force microscopy (C-AFM) has been widely used for electrical characterization of dielectric film and gate oxide integrity (GOI). In this work, C-AFM has been successfully employed to isolate defects in the contact level and to discriminate various contact types. The current mapping of C-AFM has the potential to identify micro-leaky contacts better than voltage contrast (VC) imaging in SEM. It also provides I/V information that is helpful to diagnose the failure mechanism by comparing I/V curves of different contact types. C-AFM is able to localize faulty contacts with pico-amp current range and to characterize failure with nano-meter scale lateral resolution. C-AFM should become an important technique for IC fault localization. FA examples of this technique will be discussed in the article.


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