scholarly journals Reversible Logic Based MOS Current Mode Logic Implementation in Digital Circuits

2022 ◽  
Vol 70 (2) ◽  
pp. 3609-3624
Author(s):  
S. Sharmila Devi ◽  
V. Bhanumathi
Keyword(s):  
Digital Circuits ◽  
Current Mode ◽  
Reversible Logic ◽  
Current Mode Logic

PROPAGATION DELAY IN HIGH SPEED SILICON BIPOLAR AND GaAs HBT DIGITAL CIRCUITS

1990 ◽  
Vol 01 (01) ◽  
pp. 101-124 ◽  
Author(s):  
P.K. TIEN
Keyword(s):  
High Speed ◽  
Digital Circuits ◽  
Logic Gate ◽  
Current Mode ◽  
Propagation Delay ◽  
Digital Circuit ◽  
Large Signal ◽  
Current Mode Logic ◽  
Bipolar Technology ◽  
A Charge

The needs for multi-gigabits/second digital electronics in advanced lightwave systems have motivated R & D for the next generation of high speed bipolar technology. The speed of the digital circuit may be estimated from the propagation delay of the logic gate. We discuss physics of the delay and show that it is fundamentally limited by the time needed for turning on (off) a transistor and by the time for charging (discharging) of capacitances in the circuit. We present a large-signal theory based on a charge-control model for the calculation of these limits. The results obtained for emitter coupled logic and current mode logic are used to analyze current technologies of silicon bipolar and GaAs HBTs.

scholarly journals MOS Current Mode Logic with Capacitive Coupling

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Kirti Gupta ◽  
Neeta Pandey ◽  
Maneesha Gupta
Keyword(s):  
Analytical Model ◽  
Digital Circuits ◽  
Logic Gates ◽  
Current Mode ◽  
Cmos Technology ◽  
Capacitive Coupling ◽  
Ring Oscillator ◽  
Switching Speed ◽  
Current Mode Logic

A new MOS current mode logic (MCML) style exhibiting capacitive coupling to enhance the switching speed of the digital circuits is proposed. The mechanism of capacitive coupling and its effect on the delay are analytically modeled. SPICE simulations to validate the accuracy of the analytical model have been carried out with TSMC 0.18 μm CMOS technology parameters. Several logic gates such as five-stage ring oscillator, NAND, XOR2, XOR3, multiplexer, and demultiplexer based on the proposed logic style are implemented and their performance is compared with the conventional logic gates. It is found that the logic gates based on the proposed MCML style lower the delay by 23 percent. An asynchronous FIFO based on the proposed MCML style has also been implemented as an application.

scholarly journals Design of Filter Using MOS Current Mode Logic

10.11591/550 ◽  
2016 ◽  
Vol 5 (1) ◽  
Author(s):  
J Princy Joice ◽  
M Anitha ◽  
I Rexlin Sheeba
Keyword(s):  
Current Mode ◽  
Current Mode Logic
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