scholarly journals Adaptive On-Time Control Buck Converter with a Novel Virtual Inductor Current Circuit

Electronics ◽  
2021 ◽  
Vol 10 (17) ◽  
pp. 2143 ◽  
Author(s):  
Hsiao-Hsing Chou ◽  
Hsin-Liang Chen ◽  
Yang-Hsin Fan ◽  
San-Fu Wang

This study presents a new virtual inductor current circuit to reduce circuit complexity, which is not necessary to sense inductance current directly. The buck converter was designed to produce an output voltage of 1.0–2.5 V for a 3.0–3.6 V input voltage. The load current range was from 100 mA to 500 mA. It was simulated and verified by SIMPLIS and MathCAD. The simulation results of this buck converter show that the voltage error is within 1%, and the recovery time is smaller than 2 ms for step-up and step-down load transients. Additionally, it achieves less than 26 mV overshoot at full-load step transient response. The circuit topology would be able to fabricate using TSMC 0.35 mm 2P4M CMOS technology. The control mechanism, implementation, and design procedure are presented in this paper.

2020 ◽  
Vol 26 (7) ◽  
pp. 62-82
Author(s):  
Luay Thamir Rasheed

The aim of this paper is to design a PID controller based on an on-line tuning bat optimization algorithm for the step-down DC/DC buck converter system which is used in the battery operation of the mobile applications. In this paper, the bat optimization algorithm has been utilized to obtain the optimal parameters of the PID controller as a simple and fast on-line tuning technique to get the best control action for the system. The simulation results using (Matlab Package) show the robustness and the effectiveness of the proposed control system in terms of obtaining a suitable voltage control action as a smooth and unsaturated state of the buck converter input voltage of ( ) volt that will stabilize the buck converter system performance. The simulation results show also that the proposed control system when compared with the other controllers results has the capability of minimizing the rising time to (  sec) and the settling time to (  sec) in the transient response and minimizing the voltage tracking error of the system output to ( ) volt at the steady state response. Furthermore, the number of fitness evaluations is decreased.


2021 ◽  
Vol 256 ◽  
pp. 02021
Author(s):  
Sun Quan ◽  
Sun Yuan

This paper introduces the working principle of Buck converter under voltage control, and studies the modeling method of Buck converter under special power electronics simulation software. Finally, the simulation of the converter is carried out under the condition of the mutation of input voltage and load. The simulation results show that the voltage control strategy has good transient response and anti-jamming ability, which has a good guiding significance for practical application.


2014 ◽  
Vol 24 (01) ◽  
pp. 1550005 ◽  
Author(s):  
Fabian Khateb ◽  
Montree Kumngern ◽  
Spyridon Vlassis ◽  
Costas Psychalinos ◽  
Tomasz Kulej

This paper presents a new CMOS structure for a fully balanced differential difference amplifier (FB-DDA) designed to operate from a sub-volt supply. This structure employs the bulk-driven quasi-floating-gate (BD-QFG) technique to achieve the capability of an ultra-low voltage operation and an extended input voltage range. The proposed BD-QFG FB-DDA is suitable for ultra-low-voltage low-power applications. The circuit is designed with a single supply of 0.5 V and consumes only 357 nW of power. The proposed circuit was simulated in a 0.18-μm TSMC CMOS technology and the simulation results prove its functionality and attractive parameters. An application example of a state variable filter is also presented to confirm the usefulness of the proposed BD-QFG FB-DDA.


2017 ◽  
Vol 26 (08) ◽  
pp. 1740003 ◽  
Author(s):  
Daniel Arbet ◽  
Viera Stopjaková ◽  
Martin Kováč ◽  
Lukáš Nagy ◽  
Matej Rakús ◽  
...  

In this paper, a variable gain amplifier (VGA) designed in 130 nm CMOS technology is presented. The proposed amplifier is based on the bulk-driven (BD) design approach, which brings a possibility to operate with low supply voltage. Since the supply voltage of only 0.6 V is used for the amplifier to operate, there is no risk of latch-up event that usually represents the main drawback of the BD circuit systems. BD transistors are employed in the input differential stage, which makes it possible to operate in rail-to-rail input voltage range. Achieved simulation results indicate that gain of the proposed VGA can be varied in a wide scale, which together with the low supply voltage feature make the proposed amplifier useful for low-voltage and low-power applications. An additional circuit responsible for maintaining the linear-in-decibel gain dependency of the VGA is also addressed. The proposed circuit block avails arbitrary shaping of the curve characterizing the gain versus the controlling voltage dependency.


2015 ◽  
Vol 793 ◽  
pp. 211-215
Author(s):  
Mazwin Mazlan ◽  
Noor Haqkimi ◽  
Chanuri Charin ◽  
Nur Fairuz ◽  
Nurul Izni ◽  
...  

Switched mode DC-DC converters are electronic circuits which convert a voltage from one level to a higher or lower level voltage. This paper presents a new solution approach to controller and observer controller of DC-DC Buck converter. The designs in this paper of DC-DC Buck converter is input voltage 20V step down to 12V output voltage. For control the system simulation investigation into development of controller and observer controller using MATLAB Simulink® software. The simulation develops of the controller and observer controller with mathematical model of DC-DC Buck converter. This paper also providing LQR controller to compare the performance of the system. Finally, the performance output voltage of DC-DC Buck converter is analyzed in terms of time response, overshoot and steady state error.


Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2333
Author(s):  
Xi Zhang ◽  
Tianshi Wang ◽  
Bocheng Bao

Fast load transient response and high light-load efficiency are two key features of the constant on-time (COT) control technique that has been widely used in numerous applications, such as for voltage regulators and point-of-load converters. However, when load step-down occurs during an on-time interval, the COT controller cannot respond until the COT interval expires. This delay causes an additional output voltage overshoot, resulting in unloading transient performance limitation. To eliminate the delay and improve the unloading transient response of the COT controller, a load step-down detection circuit is proposed based on capacitor current COT (CC-COT) control. In the detection circuit, the load step-down is monitored by comparing the measured capacitor current with the preset threshold voltage. Once the load step-down is monitored, the on-time is promptly truncated and the switch is turned off. With the proposed detection circuit, the CC-COT-controlled buck converter can monitor the load step-down without any delay and obtain less output voltage overshoot when the load step-down occurs during the on-time interval. PSIM circuit simulations are employed to demonstrate the feasibility of the detection circuit.


Energies ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 3086 ◽  
Author(s):  
David Angulo-Garcia ◽  
Fabiola Angulo ◽  
Gustavo Osorio ◽  
Gerard Olivar

Reliable and robust control of power converters is a key issue in the performance of numerous technological devices. In this paper we show a design technique for the control of a DC-DC buck converter with a switching technique that guarantees both good performance and global stability. We show that making use of the contraction theorem in the Jordan canonical form of the buck converter, it is possible to find a switching surface that guarantees stability but it is incapable of rejecting load perturbations. To overcome this, we expand the system to include the dynamics of the voltage error and we demonstrate that the same design procedure is not only able to stabilize the system to the desired operation point but also to reject load, input voltage, and reference voltage perturbations.


2020 ◽  
Vol 38 ◽  
pp. 179-191
Author(s):  
Minh Tri Tran ◽  
Yi Fei Sun ◽  
Yasunori Kobori ◽  
Anna Kuwana ◽  
Haruo Kobayashi

This paper presents a novel circuit design technique for an inductor type step-down buck converter in a blue-tooth receiver. Based on the superposition principle, a model of this system is proposed and verified by simulation. The overshoot phenomena is well controlled when R, L and C components are chosen by a relation |ZL|=|ZC|=2R based on a balanced charge and discharge time condition T=2π√LC=4πRC. Furthermore, a fundamental harmonic notch filter is recommended to keep small ripple which is designed at the fundamental harmonic frequency of PWM signal. A battery supply voltage of 3.6V was applied to the converter and the output voltage was set to 1.8V. The design of this methodology is given through the CMOS technology. As a result, a 1.8V stable step-down buck converter is designed for a blue-tooth low-IF receiver which the ripple is smaller than 0.2mVpp.


2017 ◽  
Vol 26 (05) ◽  
pp. 1750073
Author(s):  
Abdullah El-Bayoumi ◽  
Hassan Mostafa ◽  
Ahmed M. Soliman

Time-based Analog-to-Digital Converter (TADC), plays a major role in designing Software-Defined Radio (SDR) receivers, at scaled CMOS technologies, as it manifests lower area and power than conventional ADCs. TADC consists of 2 major blocks. The input voltage is converted into a pulse delay using a Voltage-to-Time Converter (VTC). In additions, the pulse delay is converted into a digital word using a Time-to-Digital Converter (TDC). In this paper, a novel fully-differential VTC based on a new methodology is presented which reports a highly-linear design. A metal-insulator-metal (MIM) capacitor as well as a dynamic calibration technique based on a set of large-sized capacitor-based voltage dividers circuits are utilized to automatically compensate the Process-Voltage-Temperature (PVT) variations. Moreover, the layout design is introduced. The proposed design operates on a 1[Formula: see text]GS/s sampling frequency with a supply voltage of 1.2[Formula: see text]V. After calibration, simulation results, using TSMC 65[Formula: see text]nm CMOS technology, report a 1.42[Formula: see text]V wider dynamic range due to the differential mechanism with a 3% linearity error. This design achieves a resolution up to 14 bits, a 0.07 fJ/conversion FOM, a 229[Formula: see text][Formula: see text]m2 area and a 0.25[Formula: see text]mW power. The simulation results are compared to the single-ended VTC results and the state-of-the-art analog-part ADCs results to show the strength of the proposed design.


Author(s):  
David Angulo-Garcia ◽  
Fabiola Angulo ◽  
Gustavo Osorio ◽  
Gerard Olivar

Reliable and robust control of power converters is a key issue in the performance of numerous technological devices. In this paper we show a design technique for the control of a DC-DC buck converter with a switching technique that guarantees not only good performance but also global stability. We show that making use of the contraction theorem in the Jordan canonical form of the buck converter, it is possible to find a switching surface that guarantees stability but it is incapable of rejecting load perturbations. To overcome this, we expand the system to include the dynamics of the voltage error and we demonstrate that the same design procedure is not only able to stabilize the system to the desired operation point but also to reject load, input voltage and reference voltage perturbations.


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