scholarly journals Exploiting Data Compression for Adaptive Block Placement in Hybrid Caches

Electronics ◽  
2022 ◽  
Vol 11 (2) ◽  
pp. 240
Author(s):  
Beomjun Kim ◽  
Yongtae Kim ◽  
Prashant Nair ◽  
Seokin Hong

STT-RAM (Spin-Transfer Torque Random Access Memory) appears to be a viable alternative to SRAM-based on-chip caches. Due to its high density and low leakage power, STT-RAM can be used to build massive capacity last-level caches (LLC). Unfortunately, STT-RAM has a much longer write latency and a much greater write energy than SRAM. Researchers developed hybrid caches made up of SRAM and STT-RAM regions to cope with these challenges. In order to store as many write-intensive blocks in the SRAM region as possible in hybrid caches, an intelligent block placement policy is essential. This paper proposes an adaptive block placement framework for hybrid caches that incorporates metadata embedding (ADAM). When a cache block is evicted from the LLC, ADAM embeds metadata (i.e., write intensity) into the block. Metadata embedded in the cache block are then extracted and used to determine the block’s write intensity when it is fetched from main memory. Our research demonstrates that ADAM can enhance performance by 26% (on average) when compared to a baseline block placement scheme.

2012 ◽  
Vol 48 (11) ◽  
pp. 3025-3030 ◽  
Author(s):  
E. Chen ◽  
D. Apalkov ◽  
A. Driskill-Smith ◽  
A. Khvalkovskiy ◽  
D. Lottis ◽  
...  

SPIN ◽  
2012 ◽  
Vol 02 (03) ◽  
pp. 1240001 ◽  
Author(s):  
ZIHUI WANG ◽  
YUCHEN ZHOU ◽  
JING ZHANG ◽  
YIMING HUAI

This paper reviews the recent progress made to realize reliable write operations in spin transfer torque magnetic random access memory. Theoretical description of write error rate (WER) based on macro-spin models are discussed with comparison to experimental data. Recent studies on the phenomena that can lead to abnormal WER behaviors which include back-hopping and low probability bifurcated switching are reviewed with emphasis on underlying mechanism. The studies on the WER in perpendicular magnetic tunnel junction (MTJ) are also reviewed. It is demonstrated that, for both in-plane and perpendicular MTJ, reliable and error-free write operations can be achieved with thorough understanding of the underlying physics and innovative design/process solutions.


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