scholarly journals FPGA Implementation of Some Second Round NIST Lightweight Cryptography Candidates

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1940
Author(s):  
Brisbane Ovilla-Martínez ◽  
Cuauhtemoc Mancillas-López ◽  
Alberto F. Martínez-Herrera ◽  
José A. Bernal-Gutiérrez
Keyword(s):  
Hardware Implementation ◽  
Academic Community ◽  
Implementation Cost ◽  
Lightweight Cryptography ◽  
Hardware Implementations ◽  
Open Process ◽  
And Performance ◽  
Resource Constrained Devices ◽  
The U.S ◽  
Constrained Devices

For almost one decade, the academic community has been working in the design and analysis of new lightweight primitives. This cryptography development aims to provide solutions tailored for resource-constrained devices. The U.S. National Institute of Standards and Technology (NIST) started an open process to create a Lightweight Cryptography Standardization portfolio. As a part of the process, the candidates must demonstrate their suitability for hardware implementation. Cost and performance are two of the criteria to be evaluated. In this work, we present the analysis of costs and performance in hardware implementations over five NIST LWC Round 2 candidates, COMET, ESTATE-AES/Gift, LOCUS, LOTUS, and Oribatida. Each candidate’s implementation was adapted to the Hardware API for Lightweight Cryptography for fair benchmarking of hardware cores. The results were generated for Xilinx Artix-7 xc7a12tcsg325-3. The results indicate that it is feasible to achieve the reduction of each solution below 2000 LUTs and 2000 slices where some of them (the variants of ESTATE-AES/Gift) are below 850 LUTs and 600 FF when they are included in the LWC CryptoCore.

scholarly journals Emotion Recognition on Edge Devices: Training and Deployment

Sensors ◽  
2021 ◽  
Vol 21 (13) ◽  
pp. 4496
Author(s):  
Vlad Pandelea ◽  
Edoardo Ragusa ◽  
Tommaso Apicella ◽  
Paolo Gastaldo ◽  
Erik Cambria
Keyword(s):  
Emotion Recognition ◽  
Language Processing ◽  
Computational Cost ◽  
Sequential Learning ◽  
High Quality ◽  
Fast Training ◽  
Online Sequential Learning ◽  
And Performance ◽  
Resource Constrained Devices ◽  
Constrained Devices

Emotion recognition, among other natural language processing tasks, has greatly benefited from the use of large transformer models. Deploying these models on resource-constrained devices, however, is a major challenge due to their computational cost. In this paper, we show that the combination of large transformers, as high-quality feature extractors, and simple hardware-friendly classifiers based on linear separators can achieve competitive performance while allowing real-time inference and fast training. Various solutions including batch and Online Sequential Learning are analyzed. Additionally, our experiments show that latency and performance can be further improved via dimensionality reduction and pre-training, respectively. The resulting system is implemented on two types of edge device, namely an edge accelerator and two smartphones.

scholarly journals Permutation-Based Lightweight Authenticated Cipher with Beyond Conventional Security

2021 ◽  
Vol 2021 ◽  
pp. 1-9
Author(s):  
Ping Zhang
Keyword(s):  
Hardware Implementation ◽  
Authenticated Encryption ◽  
Resource Constrained ◽  
Large Capacity ◽  
Efficiency Optimization ◽  
Security Proof ◽  
Almost All ◽  
Resource Constrained Devices ◽  
Constrained Devices

Lightweight authenticated ciphers are specially designed as authenticated encryption (AE) schemes for resource-constrained devices. Permutation-based lightweight authenticated ciphers have gained more attention in recent years. However, almost all of permutation-based lightweight AE schemes only ensure conventional security, i.e., about c / 2 -bit security, where c is the capacity of the permutation. This may be vulnerable for an insufficiently large capacity. This paper focuses on the stronger security guarantee and the better efficiency optimization of permutation-based lightweight AE schemes. On the basis of APE series (APE, APE R I , APE O W , and APE C A ), we propose a new improved permutation-based lightweight online AE mode APE + which supports beyond conventional security and concurrent absorption. Then, we derive a simple security proof and prove that APE + enjoys at most about min r , c -bit security, where r is the rate of the permutation. Finally, we discuss the properties of APE + on the hardware implementation.

scholarly journals A NEW STREAM CIPHER BASED ON FIALKA M-125

2013 ◽  
Vol 57 (1) ◽  
pp. 101-118
Author(s):  
Eugen Antal ◽  
Viliam Hromada
Keyword(s):  
Stream Cipher ◽  
International Workshop ◽  
Resource Constrained ◽  
Lightweight Cryptography ◽  
Basic Performance ◽  
The Cold War ◽  
Continuous Running ◽  
Resource Constrained Devices ◽  
Constrained Devices

ABSTRACT In 2010, a new cipher Hummingbird by [Engels, D.-Fan, X.- -Gong, G.-Hu, H.-Smith, E. M. Hummingbird: Ultra-Lightweight Cryptography for Resource-Constrained Devices, in: 1st International Workshop on Lightweight Cryptography for Resource-Constrained Devices. Tenerife, Canary Islands, Spain, January 2010] was proposed. It is a combination of both block and stream cipher and its design was inspired and motivated by the Enigma machine. The encryption process of the cipher can be considered as a continuous running of a rotor-cipher. Four block ciphers play the role of the rotors that apply the permutation to the 16-bit words. This cipher motivated us to investigate a new cipher design based on a Fialka cipher machine. Fialka M-125 is an Enigma based rotor-cipher machine used during the Cold War. It is considered one of the most secure cipher machines. Advantages of this cipher are based on the elimination of the Enigma’s known weaknesses. There are no known attacks on this cipher. In this paper we introduce a new cipher based on the Fialka machine. We transform the Fialka encryption algorithm to a modern stream cipher. The rotors are represented as S-boxes and shift registers are used to provide the rotor clocking. We propose three different versions of the cipher and investigate the statistical properties of their outputs. In the article we also provide basic implementation details and basic performance analysis.

scholarly journals Hybrid lightweight Signcryption scheme for IoT

2021 ◽  
Vol 11 (1) ◽  
pp. 391-398
Author(s):  
M. Sruthi ◽  
Rajkumar Rajasekaran
Keyword(s):  
Conventional Method ◽  
Block Cipher ◽  
Resource Constrained ◽  
Session Key ◽  
Lightweight Cryptography ◽  
Lightweight Block Cipher ◽  
Signcryption Scheme ◽  
Resource Constrained Devices ◽  
Constrained Devices

Abstract The information transmitted in IoT is susceptible to affect the user’s privacy, and hence the information ought to be transmitted securely. The conventional method to assure integrity, confidentiality, and non-repudiation is to first sign the message and then encrypt it. Signcryption is a technique where the signature and the encryption are performed in a single round. The current Signcryption system uses traditional cryptographic approaches that are overloaded for IoT, as it consists of resource-constrained devices and uses the weak session key to encrypt the data. We propose a hybrid Signcryption scheme that employs PRESENT, a lightweight block cipher algorithm to encrypt the data, and the session key is encrypted by ECC. The time taken to signcrypt the proposed Signcryption is better when compared to current Signcryption techniques, as it deploys lightweight cryptography techniques that are devoted to resource-constrained devices.

scholarly journals Compact Hardware Architectures of Enocoro-128v2 Stream Cipher for Constrained Embedded Devices

Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1505
Author(s):  
Lampros Pyrgas ◽  
Paris Kitsos
Keyword(s):  
Hardware Implementation ◽  
Stream Cipher ◽  
Hardware Description Language ◽  
Description Language ◽  
Embedded Devices ◽  
Lightweight Cryptography ◽  
Hardware Architectures ◽  
Hardware Description ◽  
First Time ◽  
Constrained Devices

Lightweight cryptography is a vital and fast growing field in today’s world where billions of constrained devices interact with each other. In this paper, two novel compact architectures of the Enocoro-128v2 stream cipher are presented. The Enocoro-128v2 is part of the ISO/IEC 29192-3 standard. The first architecture has an 8-bit datapath while the second one has a 4-bit datapath. The proposed architectures were implemented on the BASYS3 board (Artix 7 XC7A35T) using the VERILOG hardware description language. The hardware implementation of the proposed 8-bit architecture runs at a 189 MHz clock and reaches a throughput equal to 302 Mbps, while at the same time, it utilizes only 254 Look-up Tables (LUTs) and 330 Flip-flops (FFs). Each round of computations requires 5 clock cycles. The 4-bit implementation has an operating frequency of 204 MHz and reaches a throughput equal to 181 Mbps, with each round requiring 9 clock cycles. The 4-bit implementation utilizes 249 LUTs and 343 FFs. To our knowledge, this is the first time that such implementations of the Enocoro-128v2 are presented. Both implementations utilize a very low number of resources (only 78 FPGA slices are required for the 8-bit architecture and only 83 for the 4-bit one) and the results demonstrate that they are sustainable for area constrained embedded devices.

Lightweight Cryptography in Cloud-Based IoT

2021 ◽  
pp. 190-216
Author(s):  
Payel Guria ◽  
Aditya Bhattacharyya
Keyword(s):  
Cloud Computing ◽  
Internet Technology ◽  
The Novel ◽  
Resource Constrained ◽  
Lightweight Cryptography ◽  
The World ◽  
Cryptographic Algorithms ◽  
Limited Power ◽  
Resource Constrained Devices ◽  
Constrained Devices

IoT and cloud computing are the novel fields that are rapidly progressing in the world of internet technology. A huge and massive amount of data are communicating via IoT and cloud devices. Along with the highly configured devices, IoT and cloud also empowered many resource-constrained devices to communicate and compute information through network. But the major problem that they face is how to provide data security through conventional cryptographic algorithms in such resource-constrained devices having smaller size, limited memory spaces, low computation capabilities, and limited power. In this scenario, the biggest driver towards the problem is lightweight cryptography (LWC). This chapter discusses thoroughly the LWC, different schemes of LWC, and cryptanalysis of different LWC schemes.

scholarly journals Energy-Efficient and High-throughput Implementations of Lightweight Block Cipher

2019 ◽  
Vol 9 (2S) ◽  
pp. 35-41
Keyword(s):  
High Throughput ◽  
Energy Efficient ◽  
High Speed ◽  
Block Cipher ◽  
Lightweight Cryptography ◽  
Trade Off ◽  
Lightweight Block Cipher ◽  
Secure Transmission ◽  
Resource Constrained Devices ◽  
Constrained Devices

Security in resource-constrained devices has drawn the great attentions to researchers in recent years. To make secure transmission of critical information in such devices, lightweight cryptography algorithms come in light to large extend. KLEIN has been popular lightweight block cipher used to overcome such issues. In this paper, different architectures of KLEIN block cipher are presented. One of designs enhances the efficiency with regard to the throughput at the expense of a larger area. In order to make such designs, the pipelined registers are placed on different positions in datapath algorithm. The proposed design transforms the data input to protected output with the speed of 2414.13 Mbps for xc5vlx50t-3ff1136 device. In addition, the second design implementation completes either one or more than one round in only one clock and gives energy-efficient and high throughput implementations. Due to this, a trade-off between area and speed can be analyzed for high-speed applications. Moreover, this proposed design shows that with increasing the area of cipher implementation results in more transformation of plaintext into ciphertext. All results are verified and simulated for various families of Xilinx ISE design suite.

Photon: a new mix columns architecture on FPGA

2018 ◽  
Vol 7 (2.14) ◽  
pp. 138
Author(s):  
Yasir Amer Abbas ◽  
Razali Jidin ◽  
Norziana Jamil ◽  
Muhammad Reza Z’aba ◽  
Mohamad Afendee Mohamed
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Complex Multiplication ◽  
Smart Devices ◽  
Resource Constrained ◽  
Sensitive Data ◽  
Lightweight Cryptography ◽  
Memory Space ◽  
Resource Constrained Devices ◽  
Constrained Devices

Lightweight cryptography is an important element in smart devices that require data security as one of the features. These smart devices utilize cryptography when transferring sensitive data. Most of the smart devices are resource constrained devices and thus possess limited computing capability and low memory space. The PHOTON hash function algorithm is a promising lightweight cryptography approach for resource-constrained devices. It has a complex operation called MixColumns. This paper presents a new MixColumns architecture for PHOTON implemented on Field Programmable Gate Array (FPGA) device. In our design, the number of complex multiplication opera-tions is reduced by utilizing comparators that are based on four-bit Galois operations. The efficient PHOTON hardware design was coded using a very high speed integrated circuit hardware description language, VHDL. The design was successfully synthesized, mapped, simu-lated and tested on two FPGA evaluation boards namely, Sparten3 and Artix-7. The results show that the proposed design achieve a throughput of 582 Mbps and an efficiency of 1.55 Gbps/slice for Spartan3, while a throughput of 1.41 Gbps and efficiency of 8.66 Gbps/slice are obtained for Artix-7. The performance on both platforms has superseded performance of existing implementations in litera-ture.  

scholarly journals Implementation of new hybrid lightweight cryptosystem

2018 ◽  
Vol 16 (1/2) ◽  
pp. 195-206 ◽  
Author(s):  
C.G. Thorat ◽  
V.S. Inamdar
Keyword(s):  
Block Cipher ◽  
Software Performance ◽  
Software Environment ◽  
Cryptographic Primitives ◽  
Lightweight Cryptography ◽  
Avalanche Effect ◽  
Industrial Installation ◽  
Lightweight Encryption ◽  
Resource Constrained Devices ◽  
Constrained Devices

Embedded systems, Internet of Things (IoT) and mobile computing devices are used in various domains which include public-private infrastructure, industrial installation and critical environment. Generally, information handled by these devices is private and critical. Therefore, it must be appropriately secured from different attacks and hackers. Lightweight cryptography is an aspiring field which investigates the implementation of cryptographic primitives and algorithms for resource constrained devices. In this paper, a new compact hybrid lightweight encryption technique has been proposed. Proposed technique uses the fastest bit permutation instruction PERMS with S-box of PRESENT block cipher for non-linearity. An arbitrary n-bit permutation is performed using PERMS instruction in less than log (n) number of instructions. This new hybrid system has been analyzed for software performance on Advanced RISC Machine (ARM) and Intel processor whereas Cadens tool is used to analyze the hardware performance. The result of the proposed technique is improved by the factor of eight as compared to the PRESENT-GRP hybrid block cipher. Moreover, PERMS instruction bit permutation properties result a very good avalanche effect and compact implementation in the both hardware and software environment.

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