Control-Loop-Based Impedance Enhancement of Grid-Tied Inverters for Harmonic Suppression: Principle and Implementation
To understand different control loops that have been proposed to improve the quality of current into grid from the perspective of output impedance, control-loop-based output impedance enhancement of grid-tied inverters for harmonic suppression is proposed in this paper. The principle and generalized control loop deduction are presented for reshaping the output impedance. Taking a traditional LCL (Inductor-Capacitor-Inductor)-type inverter with dual-loop control as an example, different kinds of control loop topologies are derived step by step and further optimized for the implementation of the proposed principle. Consequently, the improved control consists of a filtering-capacitor voltage loop, and a grid current loop is found which can remove the existing inner capacitor current loop and therefore simplify the control. Finally, the effectiveness of the proposed control method is compared with the existing method and both are verified by simulations and experiments.