scholarly journals Anomalous Properties of the Dislocation-Free Interface between Si(111) Substrate and 3C-SiC(111) Epitaxial Layer

Materials ◽  
2020 ◽  
Vol 14 (1) ◽  
pp. 78
Author(s):  
Sergey A. Kukushkin ◽  
Andrey V. Osipov

Thin films of single-crystal silicon carbide of cubic polytype with a thickness of 40–100 nm, which were grown from the silicon substrate material by the method of coordinated substitution of atoms by a chemical reaction of silicon with carbon monoxide CO gas, have been studied by spectral ellipsometry in the photon energy range of 0.5–9.3 eV. It has been found that a thin intermediate layer with the dielectric constant corresponding to a semimetal is formed at the 3C-SiC(111)/Si(111) interface. The properties of this interface corresponding to the minimum energy have been calculated using quantum chemistry methods. It has turned out that silicon atoms from the substrate are attracted to the interface located on the side of the silicon carbide (SiC) film. The symmetry group of the entire system corresponds to P3m1. The calculations have shown that Si atoms in silicon carbide at the interface, which are the most distant from the Si atoms of the substrate and do not form a chemical bond with them (there are only 12% of them), provide a sharp peak in the density of electronic states near the Fermi energy. As a result, the interface acquires semimetal properties that fully correspond to the ellipsometry data.

Author(s):  
С.А. Кукушкин ◽  
А.В. Осипов

Spectral ellipsometry in the photon energy range 0.5–9.3 eV was used to study epitaxial films of single-crystal silicon carbide of a cubic polytype 3C-SiC of 20–120 nm grown from silicon Si by atom substitution method. It was found that at the 3C-SiC (111) / Si (111) interface a thin intermediate layer is formed with a dielectric function corresponding to semimetal. This result is confirmed by quantum chemical modeling of the properties of the 3C-SiC (111) / Si (111) interface. It was shown that the conductivity of the layer is associated with p-electrons of Si atoms of SiC at the interface of the phases which are as far as possible from the Si atoms of the substrate.


2021 ◽  
Vol 11 (4) ◽  
pp. 1783
Author(s):  
Ming-Yi Tsai ◽  
Kun-Ying Li ◽  
Sun-Yu Ji

In this study, special ceramic grinding plates impregnated with diamond grit and other abrasives, as well as self-made lapping plates, were used to prepare the surface of single-crystal silicon carbide (SiC) wafers. This novel approach enhanced the process and reduced the final chemical mechanical planarization (CMP) polishing time. Two different grinding plates with pads impregnated with mixed abrasives were prepared: one with self-modified diamond + SiC and a ceramic binder and one with self-modified diamond + SiO2 + Al2O3 + SiC and a ceramic binder. The surface properties and removal rate of the SiC substrate were investigated and a comparison with the traditional method was conducted. The experimental results showed that the material removal rate (MRR) was higher for the SiC substrate with the mixed abrasive lapping plate than for the traditional method. The grinding wear rate could be reduced by 31.6%. The surface roughness of the samples polished using the diamond-impregnated lapping plate was markedly better than that of the samples polished using the copper plate. However, while the surface finish was better and the grinding efficiency was high, the wear rate of the mixed abrasive-impregnated polishing plates was high. This was a clear indication that this novel method was effective and could be used for SiC grinding and lapping.


2000 ◽  
Vol 622 ◽  
Author(s):  
Liang-Yu Chen ◽  
Gary W. Hunter ◽  
Philip G. Neudeck

ABSTRACTSingle crystal silicon carbide (SiC) has such excellent physical, chemical, and electronic properties that SiC based semiconductor electronics can operate at temperatures in excess of 600°C well beyond the high temperature limit for Si based semiconductor devices. SiC semiconductor devices have been demonstrated to be operable at temperatures as high as 600°C, but only in a probe-station environment partially because suitable packaging technology for high temperature (500°C and beyond) devices is still in development. One of the core technologies necessary for high temperature electronic packaging is semiconductor die-attach with low and stable electrical resistance. This paper discusses a low resistance die-attach method and the results of testing carried out at both room temperature and 500°C in air. A 1 mm2 SiC Schottky diode die was attached to aluminum nitride (AlN) and 96% pure alumina ceramic substrates using precious metal based thick-film material. The attached test die using this scheme survived both electronically and mechanically performance and stability tests at 500°C in oxidizing environment of air for 550 hours. The upper limit of electrical resistance of the die-attach interface estimated by forward I-V curves of an attached diode before and during heat treatment indicated stable and low attach-resistance at both room-temperature and 500°C over the entire 550 hours test period. The future durability tests are also discussed.


2010 ◽  
Vol 645-648 ◽  
pp. 239-242 ◽  
Author(s):  
Takuro Tomita ◽  
M. Iwami ◽  
M. Yamamoto ◽  
M. Deki ◽  
Shigeki Matsuo ◽  
...  

Femtosecond (fs) laser modification on single crystal silicon carbide (SiC) was studied from the viewpoints of electric conductivity. Fourier transform infrared (FTIR) spectroscopy was carried out on femtosecond laser modified area. The intensity decrease of reststrahlen band due to the modification was observed, and this decrease was explained by the degradation of crystallinity due to the laser irradiation. Polarization dependence of reststrahlen band was also observed on laser modified samples. Current-voltage characteristics and Hall measurements on fs-laser modified region were carried out by fabricating the metal contacts on the ion implanted areas. The specific resistance up to 5.9×10-2 m was obtained for fs-laser modified area.


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