scholarly journals Efficient Implementation of ARX-Based Block Ciphers on 8-Bit AVR Microcontrollers

Mathematics ◽  
2020 ◽  
Vol 8 (10) ◽  
pp. 1837
Author(s):  
YoungBeom Kim ◽  
Hyeokdong Kwon ◽  
SangWoo An ◽  
Hwajeong Seo ◽  
Seog Chung Seo
Keyword(s):  
Personal Information ◽  
Block Ciphers ◽  
Efficient Implementation ◽  
Optimization Techniques ◽  
Sensitive Data ◽  
Additional Function ◽  
Performance Improvements ◽  
Function Calls ◽  
Improved Performance ◽  
The Cost

As the development of Internet of Things (IoT), the data exchanged through the network has significantly increased. To secure the sensitive data with user’s personal information, it is necessary to encrypt the transmitted data. Since resource-constrained wireless devices are typically used for IoT services, it is required to optimize the performance of cryptographic algorithms which are computation-intensive tasks. In this paper, we present efficient implementations of ARX-based Korean Block Ciphers (HIGHT and LEA) with CounTeR (CTR) mode of operation, and CTR_DRBG, one of the most widely used DRBGs (Deterministic Random Bit Generators), on 8-bit AVR Microcontrollers (MCUs). Since 8-bit AVR MCUs are widely used for various types of IoT devices, we select it as the target platform in this paper. We present an efficient implementation of HIGHT and LEA by making full use of the property of CTR mode, where the nonce value is fixed, and only the counter value changes during the encryption. On our implementation, the cost of additional function calls occurred by the generation of look-up table can be reduced. With respect to CTR_DRBG, we identified several parts that do not need to be computed. Thus, precomputing those parts in offline and using them online can result in performance improvements for CTR_DRBG. Furthermore, we applied several optimization techniques by making full use of target devices’ characteristics with AVR assembly codes on 8-bit AVR MCUs. Our proposed table generation way can reduce the cost for building a precomputation table by around 6.7% and 9.1% in the case of LEA and HIGHT, respectively. Proposed implementations of LEA and HIGHT with CTR mode on 8-bit AVR MCUs provide 6.3% and 3.8% of improved performance, compared with the previous best results, respectively. Our implementations are the fastest compared to previous LEA and HIGHT implementations on 8-bit AVR MCUs. In addition, the proposed CTR_DRBG implementations on AVR provide better performance by 37.2% and 8.7% when the underlying block cipher is LEA and HIGHT, respectively.

scholarly journals Iterative Spatial Crowdsourcing in Peer-to-Peer Opportunistic Networks

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1085
Author(s):  
Jurairat Phuttharak ◽  
Seng W. Loke
Keyword(s):  
Energy Consumption ◽  
Context Awareness ◽  
Opportunistic Networks ◽  
Peer To Peer ◽  
Powerful Method ◽  
Spatial Crowdsourcing ◽  
Performance Improvements ◽  
Time Usage ◽  
Improved Performance ◽  
The Cost

Spatial crowdsourcing is a potentially powerful method for incorporating human wisdom into mobile computations to solve problems while exploiting the advantages of mobility and context-awareness. This paper proposes and investigates task assignments and recruitment in iterative spatial crowdsourcing processes to find regions of particular interest among a collection of regions. We consider cases where associations between regions can be exploited to reduce costs and increase efficiency in crowdsourcing. We describe five approaches, incorporated into crowdsourcing algorithms, for reducing the cost (the number of queries required) and increasing the efficiency (reducing the number of rounds of querying required) in using such spatial crowdsourcing. We demonstrate the performance improvements gained using these approaches based on simulation scenarios. The findings show the interplay and relationships among our proposed approaches using a range of metrics including responses, energy consumption, costs, and time usage. These metrics are demonstrated via a range of scenarios, showing that our proposed approaches can lead to improved performance over randomly choosing regions for inquiry.

scholarly journals Parallel Implementations of ARX-Based Block Ciphers on Graphic Processing Units

Mathematics ◽  
2020 ◽  
Vol 8 (11) ◽  
pp. 1894
Author(s):  
SangWoo An ◽  
YoungBeom Kim ◽  
Hyeokdong Kwon ◽  
Hwajeong Seo ◽  
Seog Chung Seo
Keyword(s):  
Graphics Processing Units ◽  
Block Cipher ◽  
Personal Information ◽  
Operation Mode ◽  
Optimization Methods ◽  
Block Ciphers ◽  
Optimization Techniques ◽  
Parallel Optimization ◽  
Graphic Processing Units ◽  
Iot Devices

With the development of information and communication technology, various types of Internet of Things (IoT) devices have widely been used for convenient services. Many users with their IoT devices request various services to servers. Thus, the amount of users’ personal information that servers need to protect has dramatically increased. To quickly and safely protect users’ personal information, it is necessary to optimize the speed of the encryption process. Since it is difficult to provide the basic services of the server while encrypting a large amount of data in the existing CPU, several parallel optimization methods using Graphics Processing Units (GPUs) have been considered. In this paper, we propose several optimization techniques using GPU for efficient implementation of lightweight block cipher algorithms on the server-side. As the target algorithm, we select high security and light weight (HIGHT), Lightweight Encryption Algorithm (LEA), and revised CHAM, which are Add-Rotate-Xor (ARX)-based block ciphers, because they are used widely on IoT devices. We utilize the features of the counter (CTR) operation mode to reduce unnecessary memory copying and operations in the GPU environment. Besides, we optimize the memory usage by making full use of GPU’s on-chip memory such as registers and shared memory and implement the core function of each target algorithm with inline PTX assembly codes for maximizing the performance. With the application of our optimization methods and handcrafted PTX codes, we achieve excellent encryption throughput of 468, 2593, and 3063 Gbps for HIGHT, LEA, and revised CHAM on RTX 2070 NVIDIA GPU, respectively. In addition, we present optimized implementations of Counter Mode Based Deterministic Random Bit Generator (CTR_DRBG), which is one of the widely used deterministic random bit generators to provide a large amount of random data to the connected IoT devices. We apply several optimization techniques for maximizing the performance of CTR_DRBG, and we achieve 52.2, 24.8, and 34.2 times of performance improvement compared with CTR_DRBG implementation on CPU-side when HIGHT-64/128, LEA-128/128, and CHAM-128/128 are used as underlying block cipher algorithm of CTR_DRBG, respectively.

scholarly journals Highly Efficient Implementation of Block Ciphers on Graphic Processing Units for Massively Large Data

2020 ◽  
Vol 10 (11) ◽  
pp. 3711 ◽  
Author(s):  
SangWoo An ◽  
Seog Chung Seo
Keyword(s):  
Cloud Computing ◽  
Block Cipher ◽  
Personal Information ◽  
Large Data ◽  
Block Ciphers ◽  
Optimization Techniques ◽  
Graphic Processing Units ◽  
Highly Efficient ◽  
Cloud Computing Service ◽  
Graphic Processing

With the advent of IoT and Cloud computing service technology, the size of user data to be managed and file data to be transmitted has been significantly increased. To protect users’ personal information, it is necessary to encrypt it in secure and efficient way. Since servers handling a number of clients or IoT devices have to encrypt a large amount of data without compromising service capabilities in real-time, Graphic Processing Units (GPUs) have been considered as a proper candidate for a crypto accelerator for processing a huge amount of data in this situation. In this paper, we present highly efficient implementations of block ciphers on NVIDIA GPUs (especially, Maxwell, Pascal, and Turing architectures) for environments using massively large data in IoT and Cloud computing applications. As block cipher algorithms, we choose AES, a representative standard block cipher algorithm; LEA, which was recently added in ISO/IEC 29192-2:2019 standard; and CHAM, a recently developed lightweight block cipher algorithm. To maximize the parallelism in the encryption process, we utilize Counter (CTR) mode of operation and customize it by using GPU’s characteristics. We applied several optimization techniques with respect to the characteristics of GPU architecture such as kernel parallelism, memory optimization, and CUDA stream. Furthermore, we optimized each target cipher by considering the algorithmic characteristics of each cipher by implementing the core part of each cipher with handcrafted inline PTX (Parallel Thread eXecution) codes, which are virtual assembly codes in CUDA platforms. With the application of our optimization techniques, in our implementation on RTX 2070 GPU, AES and LEA show up to 310 Gbps and 2.47 Tbps of throughput, respectively, which are 10.7% and 67% improved compared with the 279.86 Gbps and 1.47 Tbps of the previous best result. In the case of CHAM, this is the first optimized implementation on GPUs and it achieves 3.03 Tbps of throughput on RTX 2070 GPU.

Efficient implementation of lightweight block ciphers on volta and pascal architecture

2019 ◽  
Vol 47 ◽  
pp. 235-245
Author(s):  
Pei Li ◽  
Shihao Zhou ◽  
Bingqing Ren ◽  
Shuman Tang ◽  
Ting Li ◽  
...  
Keyword(s):  
Block Ciphers ◽  
Efficient Implementation

Understanding the disclosure of personal data online

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Heather J. Parker ◽  
Stephen Flowerday
Keyword(s):  
Social Media ◽  
Information Disclosure ◽  
Cost Benefit Analysis ◽  
Personal Information ◽  
Personal Data ◽  
Cost Benefit ◽  
Content Type ◽  
Privacy Violation ◽  
The Cost ◽  
Insight Into

Purpose Social media has created a new level of interconnected communication. However, the use of online platforms brings about various ways in which a user’s personal data can be put at risk. This study aims to investigate what drives the disclosure of personal information online and whether an increase in awareness of the value of personal information motivates users to safeguard their information. Design/methodology/approach Fourteen university students participated in a mixed-methods experiment, where responses to Likert-type scale items were combined with responses to interview questions to provide insight into the cost–benefit analysis users conduct when disclosing information online. Findings Overall, the findings indicate that users are able to disregard their concerns due to a resigned and apathetic attitude towards privacy. Furthermore, subjective norms enhanced by fear of missing out (FOMO) further allows users to overlook potential risks to their information in order to avoid social isolation and sanction. Alternatively, an increased awareness of the personal value of information and having experienced a previous privacy violation encourage the protection of information and limited disclosure. Originality/value This study provides insight into privacy and information disclosure on social media in South Africa. To the knowledge of the researchers, this is the first study to include a combination of the theory of planned behaviour and the privacy calculus model, together with the antecedent factors of personal valuation of information, trust in the social media provider, FOMO.

scholarly journals Implementation of Scientific Computing Applications on the Cell Broadband Engine

2009 ◽  
Vol 17 (1-2) ◽  
pp. 135-151 ◽  
Author(s):  
Guochun Shi ◽  
Volodymyr V. Kindratenko ◽  
Ivan S. Ufimtsev ◽  
Todd J. Martinez ◽  
James C. Phillips ◽  
...  
Keyword(s):  
High Performance ◽  
Scientific Computing ◽  
Lessons Learned ◽  
Optimization Techniques ◽  
Cell Processor ◽  
Intrinsic Properties ◽  
Cell Broadband Engine ◽  
Performance Improvements ◽  
Cell Architecture ◽  
Practical Recommendations

The Cell Broadband Engine architecture is a revolutionary processor architecture well suited for many scientific codes. This paper reports on an effort to implement several traditional high-performance scientific computing applications on the Cell Broadband Engine processor, including molecular dynamics, quantum chromodynamics and quantum chemistry codes. The paper discusses data and code restructuring strategies necessary to adapt the applications to the intrinsic properties of the Cell processor and demonstrates performance improvements achieved on the Cell architecture. It concludes with the lessons learned and provides practical recommendations on optimization techniques that are believed to be most appropriate.

scholarly journals Alternative shoe closure designs alter biomechanical performance during agility-based movements

2020 ◽  
Author(s):  
Moira Pryhoda ◽  
Rachel Wathen ◽  
Jay Dicharry ◽  
Kevin Shelburne ◽  
Bradley Davidson
Keyword(s):  
Mechanical Properties ◽  
Performance Measures ◽  
Performance Measure ◽  
Male Athletes ◽  
Impaired Performance ◽  
Performance Improvements ◽  
Two Measures ◽  
Ground Contact Time ◽  
Improved Performance ◽  
Consistent Performance

The objective of this research was to determine if three alternative shoe upper closures improve biomechanical performance measures relative to a standard lace closure in court-based movements. NCAA Division 1 and club-level male athletes recruited from lacrosse, soccer, tennis, and rugby performed four court-based movements: Lateral Skater Jump repeats (LSJ), Countermovement Jump repeats (CMJ), Triangle Drop Step drill (TDS), and Anterior-Posterior drill (AP). Each athlete performed the movements in four shoe upper closures: Standard Closure, Lace Replacement, Y Wrap, and Tri Strap. Ground contact time, peak eccentric rate of force development (RFD), peak concentric GRF, peak concentric COM power, eccentric work, concentric work, and movement completion time were measured. Tri Strap saw improvements in four of seven biomechanical variables during CMJ and LSJ and one variable during TDS. Lace Replacement delivered improvements in one performance measure during CMJ, LSJ, and AP, and two variables in TDS. Y Wrap improved performance in three performance measures during LSJ and impaired performance in two measures during CMJ and three measures during AP. Tri Strap provided the most consistent performance improvements across all movements. This study allowed for the mechanical properties of the shoe lower to remain consistent across designs to examine if an alternative shoe upper closure could enhance performance. Our results indicate that increased proprioception and/or mechanical properties due to the alternative closures, especially Tri Strap, improves athlete performance, which concludes that the design of the shoe upper is an essential consideration in shoe design.

scholarly journals Decision Support System For Determining Power Loss And Refurbishability Of Failed Automotive Petrol Engine Block And Crankshaft

2021 ◽  
Author(s):  
BASIL OLUFEMI AKINNULI ◽  
OLADELE AWOPETU ◽  
OLUWASEUN OLUWAGBEMIGA OJO
Keyword(s):  
Decision Support ◽  
Power Loss ◽  
Computer Software ◽  
Engine Block ◽  
Measuring Instruments ◽  
Main Bearing ◽  
Test Engine ◽  
Cause Of Failure ◽  
Improved Performance ◽  
The Cost

Abstract The crankshaft and engine block of automobile wear or fail after certain years of usage. The cause of failure is a contributing factor to the power loss of the engine. Power loss reduces the performance of the vehicle. Due to the economic situation in Nigeria, the cost of buying new engines is usually high and some used engines have problems that are latent. Pre-test engine analysis was carried out and torque of each selected engine was measured with a dynamometer to know the speed of the worn engine. Disassembly of four (4) cylinder engines namely; Toyota, Nissan, Mitsubishi, and Mazda were carried out and the affected failed parts, namely; main bearing, crankpin journal, and bore cylinder diameter were determined and the level of their wear as well as power losses ascertained using measuring instruments. For easy computation and analysis, a computer software using C-sharp programming language was developed to determine the power loss and predicting machining level of refurbish-ability and tested for performance evaluation. The model and its developed software are decision support tools for any automotive industry where maintenance and management of engines for improved performance and efficiency of operation is the focus.

A Straight-Bladed Variable-Pitch VAWT Concept for Improved Power Generation

2003 ◽  
Author(s):  
Yann Staelens ◽  
F. Saeed ◽  
I. Paraschivoiu
Keyword(s):  
Power Output ◽  
Angle Of Attack ◽  
Correction Function ◽  
Wind Speeds ◽  
Abrupt Changes ◽  
Effective Angle ◽  
Improved Performance ◽  
Stall Angle ◽  
The Cost ◽  
Local Angle

The paper presents three modifications for an improved performance in terms of increased power output of a straight-bladed VAWT by varying its pitch. Modification I examines the performance of a VAWT when the local angle of attack is kept just below the stall value throughout its rotation cycle. Although this modification results in a very significant increase in the power output for higher wind speeds, it requires abrupt changes in the local angle of attack making it physically and mechanically impossible to realize. Modification II improves upon the first by replacing the local angle of attack by the blade static-stall angle only when the former exceeds the latter. This step eliminates the two jumps in the local effective angle of attack curve but at the cost of a slight decrease in the power output. Moreover, it requires a discontinuous angle of attack correction function which may still be practically difficult to implement and also result in an early fatigue. Modification III overcomes the limitation of the second by ensuring a continuous variation in the local angle of attack correction during the rotation cycle through the use of a sinusoidal function. Although the power output obtained by using this modification is less than the two preceding ones, it has the inherent advantage of being practically feasible.

Optimization of Multistage Machining Systems, Part 1: Mathematical Solution

1992 ◽  
Vol 114 (4) ◽  
pp. 524-531 ◽  
Author(s):  
J. S. Agapiou
Keyword(s):  
Optimization Problem ◽  
Cutting Parameters ◽  
Optimization Method ◽  
Idle Time ◽  
Optimization Techniques ◽  
Machining Parameters ◽  
Machining Time ◽  
Physical Constraints ◽  
Time Requirements ◽  
The Cost

The optimization problem for multistage machining systems has been investigated. Due to uneven time requirements at different stages in manufacturing, there could be idle times at various stations. It may be advantageous to reduce the values of machining parameters in order to reduce the cost at stations that require less machining time. However, optimization techniques available through the literature do not effectively utilize the idle time for the different stations generated during the balancing of the system. Proposed in this paper is an optimization method which utilizes the idle time to the full extent at all machining stations, with the intention of improving tool life and thus achieving cost reduction. The mathematical analysis considers the optimization of the production cost with an equality constraint of zero idle time for the stations with idle time. Physical constraints regarding the cutting parameters, force, power, surface finish, etc., as they arise in different operations, are also considered. The aforementioned problem has been theoretically analyzed and a computational algorithm developed. The advantages and effectiveness of the proposed approach are finally established through an example.

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