scholarly journals One-Dimensional (NH=CINH3)3PbI5 Perovskite for Ultralow Power Consumption Resistive Memory

Research ◽  
2021 ◽  
Vol 2021 ◽  
pp. 1-9
Author(s):  
Xuefen Song ◽  
Hao Yin ◽  
Qing Chang ◽  
Yuchi Qian ◽  
Chongguang Lyu ◽  
...  

Organic-inorganic hybrid perovskites (OIHPs) have proven to be promising active layers for nonvolatile memories because of their rich abundance in earth, mobile ions, and adjustable dimensions. However, there is a lack of investigation on controllable fabrication and storage properties of one-dimensional (1D) OIHPs. Here, the growth of 1D (NH=CINH3)3PbI5 ((IFA)3PbI5) perovskite and related resistive memory properties are reported. The solution-processed 1D (IFA)3PbI5 crystals are of well-defined monoclinic crystal phase and needle-like shape with the length of about 6 mm. They exhibit a wide bandgap of 3 eV and a high decomposition temperature of 206°C. Moreover, the (IFA)3PbI5 films with good uniformity and crystallization were obtained using a dual solvent of N,N-dimethylformamide (DMF) and dimethyl sulfoxide (DMSO). To study the intrinsic electric properties of this anisotropic material, we constructed the simplest memory cell composed of only Au/(IFA)3PbI5/ITO, contributing to a high-compacted device with a crossbar array device configuration. The resistive random access memory (ReRAM) devices exhibit bipolar current-voltage (I-V) hysteresis characteristics, showing a record-low power consumption of ~0.2 mW among all OIHP-based memristors. Moreover, our devices own the lowest power consumption and “set” voltage (0.2 V) among the simplest perovskite-based memory devices (inorganic ones are also included), which are no need to require double metal electrodes or any additional insulating layer. They also demonstrate repeatable resistance switching behaviour and excellent retention time. We envision that 1D OIHPs can enrich the low-dimensional hybrid perovskite library and bring new functions to low-power information devices in the fields of memory and other electronics applications.

2018 ◽  
Vol 2018 ◽  
pp. 1-5
Author(s):  
S. Narendran ◽  
J. Selvakumar

We have modeled a memory system using Josephson Junction to attain low power consumption using low input voltage compared to conventional Complementary Metal Oxide Semiconductor-Static Random Access Memory (CMOS-SRAM). We attained the low power by connecting a shared/common bit line and using a 1-bit memory cell. Through our design we may attain 2.5–3.5 microwatts of power using lower input voltage of 0.6 millivolts. Comparative study has been made to find which memory system will attain low power consumption. Conventional SRAM techniques consume power in the range of milliwatts with the supply input in the range of 0-10 volts. Using HDL language, we made a memory logic design of RAM cells using Josephson Junction in FreeHDL software which is dedicated only for Josephson Junction based design. With use of XILINX, we have calculated the power consumption and equivalent Register Transfer Level (RTL) schematic is drawn.


2021 ◽  
Vol 21 (8) ◽  
pp. 4303-4309
Author(s):  
Yeongjin Hwang ◽  
Jeong Hoon Jeon ◽  
Juhyun Lee ◽  
Jonghyuk Yoon ◽  
Felix Sunjoo Kim ◽  
...  

Synaptic devices, which are considered as one of the most important components of neuromorphic system, require a memory effect to store weight values, a high integrity for compact system, and a wide window to guarantee an accurate programming between each weight level. In this regard, memristive devices such as resistive random access memory (RRAM) and phase change memory (PCM) have been intensely studied; however, these devices have quite high current-level despite their state, which would be an issue if a deep and massive neural network is implemented with these devices since a large amount of current-sum needs to flow through a single electrode line. Organic transistor is one of the potential candidates as synaptic device owing to flexibility and a low current drivability for low power consumption during inference. In this paper, we investigate the performance and power consumption of neuromorphic system composed of organic synaptic transistors conducting a pattern recognition simulation with MNIST handwritten digit data set. It is analyzed according to threshold voltage (VT) window, device variation, and the number of available states. The classification accuracy is not affected by VT window if the device variation is not considered, but the current sum ratio between answer node and the rest 9 nodes varies. In contrast, the accuracy is significantly degraded as increasing the device variation; however, the classification rate is less affected when the number of device states is fewer.


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