Spin Wave Normalization Towards all Magnonic Circuits

The key enabling factor for Spin Wave (SW) technology utilization for building ultra low power circuits is the ability to energy efficiently cascade SW basic computation blocks. SW Majority gates, which constitute a universal gate set for this paradigm, operating on phase encoded data are not input output coherent in terms of SW amplitude, and as such, their cascading requires information representation conversion from SW to voltage and back, which is by no means energy effective. In this paper, a novel conversion free SW gate cascading scheme is proposed that achieves SW amplitude normalization by means of a directional coupler. After introducing the normalization concept, we utilize it in the implementation of three simple circuits and, to demonstrate its bigger scale potential, of a 2-bit inputs SW multiplier. The proposed structures are validated by means of the Object Oriented Micromagnetic Framework (OOMMF) and GPU-accelerated Micromagnetics (MuMax3). Furthermore, we assess the normalization induced energy overhead and demonstrate that the proposed approach consumes 20% to 33% less energy when compared with the transducers based conventional counterpart. Finally, we introduce a normalization based SW 2-bit inputs multiplier design and compare it with functionally equivalent SW transducer based and 16nm CMOS designs. Our evaluation indicate that the proposed approach provided 26% and 6.25x energy reductions when compared with the conventional approach and 16nm CMOS counterpart, respectively, which demonstrates that our proposal is energy effective and opens the road towards the full utilization of the SW paradigm potential and the development of SW only circuits.

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The Vietnamese Social Sciences at a Fork in the Road

10.31219/osf.io/2zrw7 ◽

2019 ◽

Author(s):

Quan-Hoang Vuong ◽

Trung Tran

Keyword(s):

Social Sciences ◽

Object Oriented ◽

Comprehensive Overview ◽

The Road ◽

Social Sciences And Humanities

The Vietnamese Social Sciences at a Fork in the Road, utilizing an object-oriented structured database on the productivity of Vietnamese researchers, seeks to provide a comprehensive overview of the development of Social Sciences and Humanities in Vietnam from 2008 to 2018.

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Spin wave based synapse and neuron for ultra low power neuromorphic computation system

2016 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2016.7527391 ◽

2016 ◽

Cited By ~ 2

Author(s):

Lang Zeng ◽

Deming Zhang ◽

Youguang Zhang ◽

Fanghui Gong ◽

Tianqi Gao ◽

...

Keyword(s):

Low Power ◽

Spin Wave ◽

Ultra Low Power

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Road Network Extraction from High Resolution Multispectral Satellite Imagery Based on Object Oriented Techniques

ISPRS Annals of Photogrammetry Remote Sensing and Spatial Information Sciences ◽

10.5194/isprsannals-ii-8-107-2014 ◽

2014 ◽

Vol II-8 ◽

pp. 107-110 ◽

Cited By ~ 11

Author(s):

M. Kumar ◽

R. K. Singh ◽

P. L. N. Raju ◽

Y. V. N. Krishnamurthy

Keyword(s):

High Resolution ◽

Satellite Imagery ◽

Road Network ◽

Object Oriented ◽

Integrated Approach ◽

Morphological Operations ◽

Target Feature ◽

Fuzzy Classifier ◽

The Road ◽

Road Network Extraction

High Resolution satellite Imagery is an important source for road network extraction for urban road database creation, refinement and updating. However due to complexity of the scene in an urban environment, automated extraction of such features using various line and edge detection algorithms is limited. In this paper we present an integrated approach to extract road network from high resolution space imagery. The proposed approach begins with segmentation of the scene with Multi-resolution Object Oriented segmentation. This step focuses on exploiting both spatial and spectral information for the target feature extraction. The road regions are automatically identified using a soft fuzzy classifier based on a set of predefined membership functions. A number of shape descriptors are computed to reduce the misclassifications between road and other spectrally similar objects. The detected road segments are further refined using morphological operations to form final road network, which is then evaluated for its completeness, correctness and quality. The experiments were carried out of fused IKONOS 2 , Quick bird ,Worldview 2 Products with fused resolution’s ranging from 0.5m to 1 m. Results indicate that the proposed methodology is effective in extracting accurate road networks from high resolution imagery.

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Microwave nonlinear spin wave directional coupler

Technical Physics Letters ◽

10.1134/s1063785006110228 ◽

2006 ◽

Vol 32 (11) ◽

pp. 979-981

Author(s):

M. A. Timofeeva ◽

A. B. Ustinov ◽

B. A. Kalinikos

Keyword(s):

Spin Wave ◽

Directional Coupler

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2-output Spin Wave Programmable Logic Gate

10.36227/techrxiv.16608325.v1 ◽

2021 ◽

Author(s):

Abdulqader Mahmoud ◽

Frederic Vanderveken ◽

Christoph Adelmann ◽

Florin Ciubotaru ◽

Sorin Cotofana ◽

...

Keyword(s):

Spin Wave ◽

Boolean Functions ◽

State Of The Art ◽

Logic Gate ◽

Object Oriented ◽

Programmable Logic ◽

Area Reduction ◽

Gate Structure ◽

Cmos Implementation ◽

Practical Implications

This paper presents a 2-output Spin-Wave Programmable Logic Gate structure able to simultaneously evaluate any pair of AND, NAND, OR, NOR, XOR, and XNOR Boolean functions. Our proposal provides the means for fanout achievement within the Spin Wave computation domain and energy and area savings as two different functions can be simultaneously evaluated on the same input data. We validate our proposal by means of Object Oriented Micromagnetic Framework (OOMMF) simulations and demonstrate that by phase and magnetization threshold output sensing \{AND, OR, NAND, NOR\} and \{XOR and XNOR\} functionalities can be achieved, respectively. To get inside into the potential practical implications of our approach we use the proposed gate to implement a 3-input Majority gate, which we evaluate and compare with state of the art equivalent implementations in terms of area, delay, and energy consumptions. Our estimations indicate that the proposed gate provides 33% and 16% energy and area reduction, respectively, when compared with spin-wave counterpart and 42% energy reduction while consuming 12x less area when compared to a 15 nm CMOS implementation.

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Stochastic Simulation on System Reliability and Component Probabilistic Importance of Road Network

Mathematical Problems in Engineering ◽

10.1155/2015/456485 ◽

2015 ◽

Vol 2015 ◽

pp. 1-5 ◽

Cited By ~ 1

Author(s):

Xiangyu Zhao ◽

Dongwei Wang ◽

Yadan Yan ◽

Ziyuan Gu

Keyword(s):

Monte Carlo ◽

Stochastic Simulation ◽

System Reliability ◽

Road Network ◽

Object Oriented ◽

Simulation Method ◽

Object Oriented Programming ◽

The Road ◽

Simulation Monte Carlo ◽

Oriented Programming Language

Because of the combination explosion problem, it is difficult to use probability analytical method to calculate the system reliability of large networks. The paper develops a stochastic simulation (Monte Carlo-based) method to study the system reliability and component probabilistic importance of the road network. The proposed method considers the characteristics of the practical road network as follows: both link (roadway segment) and node (intersection) components are emphasized in the road network; the reliability for a link or node component may be at the in-between state; namely, its reliability value is between 0 and 1. The method is then implemented using the object-oriented programming language C++ and integrated into a RARN-MGG (reliability analysis of road network using Monte Carlo, GIS, and grid) system. Finally, two numerical examples based on a simple road network and a large real road network, respectively, are carried out to characterize the feasibility and to demonstrate the strength of the stochastic simulation method.

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4-output Programmable Spin Wave Logic Gate

10.36227/techrxiv.16616095.v1 ◽

2021 ◽

Author(s):

Abdulqader Mahmoud ◽

Frederic Vanderveken ◽

Christoph Adelmann ◽

Florin Ciubotaru ◽

Said Hamdioui ◽

...

Keyword(s):

Boolean Function ◽

Spin Wave ◽

Logic Gate ◽

Logic Gates ◽

Data Representation ◽

Output Energy ◽

Element Subset ◽

Ultra Low Power ◽

Computing Paradigm ◽

Gate Structure

To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back and forth conversion between the SW and voltage domains. To achieve this, SW gates have to possess intrinsic fanout capabilities, be input-output data representation coherent, and reconfigurable. In this paper, we address the first and the last requirements and propose a novel 4-output programmable SW logic. First, we introduce the gate structure and demonstrate that, by adjusting the gate output detection method, it can parallelly evaluate any 4-element subset of the 2-input Boolean function set AND, NAND, OR, NOR, XOR, and XNOR. Furthermore, we adjust the structure such that all its 4 outputs produce SWs with the same energy and demonstrate that it can evaluate Boolean function sets while providing fanout capabilities ranging from 1 to 4. We validate our approach by instantiating and simulating different gate configurations such as 4-output AND/OR, 4-output XOR/XNOR, output energy balanced 4-output AND/OR, and output energy balanced 4-output XOR/XNOR by means of Object Oriented Micromagnetic Framework (OOMMF) simulations. Finally, we evaluate the performance of our proposal in terms of delay and energy consumption and compare it against existing state-of-the-art SW and 16nm CMOS counterparts. The results indicate that for the same functionality, our approach provides 3x and 16x energy reduction, when compared with conventional SW and 16nm CMOS implementations, respectively.

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2-output Spin Wave Programmable Logic Gate

10.36227/techrxiv.16608325 ◽

2021 ◽

Author(s):

Abdulqader Mahmoud ◽

Frederic Vanderveken ◽

Christoph Adelmann ◽

Florin Ciubotaru ◽

Sorin Cotofana ◽

...

Keyword(s):

Spin Wave ◽

Boolean Functions ◽

State Of The Art ◽

Logic Gate ◽

Object Oriented ◽

Programmable Logic ◽

Area Reduction ◽

Gate Structure ◽

Cmos Implementation ◽

Practical Implications

This paper presents a 2-output Spin-Wave Programmable Logic Gate structure able to simultaneously evaluate any pair of AND, NAND, OR, NOR, XOR, and XNOR Boolean functions. Our proposal provides the means for fanout achievement within the Spin Wave computation domain and energy and area savings as two different functions can be simultaneously evaluated on the same input data. We validate our proposal by means of Object Oriented Micromagnetic Framework (OOMMF) simulations and demonstrate that by phase and magnetization threshold output sensing \{AND, OR, NAND, NOR\} and \{XOR and XNOR\} functionalities can be achieved, respectively. To get inside into the potential practical implications of our approach we use the proposed gate to implement a 3-input Majority gate, which we evaluate and compare with state of the art equivalent implementations in terms of area, delay, and energy consumptions. Our estimations indicate that the proposed gate provides 33% and 16% energy and area reduction, respectively, when compared with spin-wave counterpart and 42% energy reduction while consuming 12x less area when compared to a 15 nm CMOS implementation.

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