New Approach to Salve Single Event Upsets Faults in Satellite Communications

2011 ◽  
Vol 110-116 ◽  
pp. 4161-4165
Author(s):  
Mahoomd Ghodratian ◽  
Ashkan Masoomi ◽  
Roozbeh Hamzehyan ◽  
Najmeh Cheraghi Shirazi
Keyword(s):  
Detailed Analysis ◽  
Error Correcting Code ◽  
Satellite Communications ◽  
Radiation Environment ◽  
Single Event ◽  
Imaging Data ◽  
Single Event Upsets ◽  
Ground Station ◽  
Hamming Error Correcting Code ◽  
The Impact

The encrypted satellite data can get corrupted before reaching the ground station due to various faults. One major source of faults is the harsh radiation environment. Single Even Upset (SEU) faults can occur on-board during encryption due to radiation. This paper presents a novel model to detect and correct Single Event Upsets in on-board implementations of the AES algorithm, which is based on Hamming error correcting code. From five modes of AES, CRT mode seems to be the best mode to encrypt satellite video and image links. A detailed analysis of the effect of SEUs on the imaging data during on-board encryption using the modes of AES is carried out. In this paper the impact of these faults on the data is discussed and compared for all the five modes of AES. A detailed analysis of the effect of SEUs on the imaging data during on-board encryption using the modes of AES is carried out.

scholarly journals Tracing Fault Effects in FPGA Systems

2014 ◽  
Vol 60 (1) ◽  
pp. 92-97 ◽  
Author(s):  
Mariusz Węgrzyn ◽  
Janusz Sosnowski
Keyword(s):  
Detailed Analysis ◽  
Fault Injection ◽  
Original Method ◽  
Injection Technique ◽  
Transient Faults ◽  
Single Event ◽  
Single Event Upsets ◽  
Fault Handling

Abstract The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.

Assessing the impact of the space radiation environment on parametric degradation and single-event transients in optocouplers

2001 ◽  
Vol 48 (6) ◽  
pp. 2202-2209 ◽  
Author(s):  
R.A. Reed ◽  
C. Poivey ◽  
P.W. Marshall ◽  
K.A. LaBel ◽  
C.J. Marshall ◽  
...  
Keyword(s):  
Space Radiation ◽  
Radiation Environment ◽  
Single Event ◽  
Single Event Transients ◽  
The Impact ◽  
Space Radiation Environment

scholarly journals The Impact of Delta-Rays on Single-Event Upsets in Highly Scaled SOI SRAMs

2010 ◽  
Author(s):  
Michael P. King ◽  
Robert A. Reed ◽  
Robert A. Weller ◽  
Marcus H. Mendenhall ◽  
Ronald D. Schrimpf ◽  
...  
Keyword(s):  
Single Event ◽  
Single Event Upsets ◽  
The Impact

scholarly journals Reduced Precision Redundancy for Satellite Telecommand Receiver Module on FPGA

2013 ◽  
Vol 2013 ◽  
pp. 1-8
Author(s):  
Salman Sadruddin ◽  
Arshad Aziz
Keyword(s):  
Hybrid Approach ◽  
Timing Recovery ◽  
Radiation Environment ◽  
Single Event ◽  
Efficient Design ◽  
Recovery Algorithm ◽  
Single Event Upsets ◽  
Costas Loop ◽  
Modular Redundancy ◽  
Radiation Tolerant

A novel and highly efficient design of a software defined radiation tolerant baseband module for a LEO satellite telecommand receiver using FPGA is presented. FPGAs in space are subject to single event upsets (SEUs) due to high radiation environment. Traditionally, triple modular redundancy (TMR) is used for mitigating Single Event Upsets (SEUs). The drawback of using TMR is that it consumes a lot of hardware resources and requires more power. Reduced precision redundancy (RPR) can be a viable alternative of TMR in digital systems for arithmetic operations. This paper uses the combination of RPR and TMR for mitigating SEUs. The designed module consumes less resources on FPGA and has bit error rate (BER) identical to theoretical results, apart from degradation due to implementation losses. An improved Costas loop and timing recovery algorithm are implemented for achieving carrier recovery and bit synchronization. The hybrid approach mitigates SEUs while consuming 26% less resources than a customary TMR protected receiver.

The Impact of Property Characteristics on Economic Performance of Russian Industrial Enterprises

2005 ◽  
pp. 53-68 ◽  
Author(s):  
R. Kapeliushnikov ◽  
N. Demina
Keyword(s):  
Detailed Analysis ◽  
Economic Performance ◽  
Ownership Concentration ◽  
Corporate Sector ◽  
Concentrated Ownership ◽  
Industrial Enterprises ◽  
Russian Industry ◽  
Control Premium ◽  
And Performance ◽  
The Impact

The paper provides new survey evidence on effects of concentrated ownership upon investment and performance in Russian industrial enterprises. Authors trace major changes in their ownership profile, assess pace of post-privatization redistribution of shareholdings and provide evidence on ownership concentration in the Russian industry. The major econometric findings are that the first largest shareholding is negatively associated with the firm’s investment and performance but surprisingly the second largest shareholding is positively associated with them. Moreover, these relationships do not depend on identity of majority shareholders. These results are consistent with the assumption that the entrenched controlling owners are engaged in extracting "control premium" but sizable shareholdings accumulated by other blockholders may put brakes on their expropriating behavior and thus be conductive for efficiency enhancing. The most interesting topic for further more detailed analysis is formation, stability and roles of coalitions of large blockholders in the corporate sector of post-socialist countries.

Sign in / Sign up

Export Citation Format

Share Document