An Optimization Harmonic Elimination Control Technique for Cascade Multilevel Inverter

2012 ◽  
Vol 229-231 ◽  
pp. 2380-2384
Author(s):  
Bing Yi Wang ◽  
Shuang Zhai ◽  
Xiao Qian Zhu
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Control Technique ◽  
Harmonic Elimination ◽  
Simulation And Experiment ◽  
Distortion Rate ◽  
Frequency Harmonic

In order to improve the quality of cascade multilevel inverter’s output voltage, this paper introduces an optimization harmonic elimination control technique. The harmonic of cascade multilevel inverter is controlled by the switch angels of inverter units. Through this technique, switch angels eliminate the low and middle frequency harmonic compositions and at the same time make total harmonic distortion rate of cascade multilevel inverter low are found. The correctness and accuracy of optimization harmonic elimination control technique are validated by simulation and experiment model.

A Symmetrical Multilevel Inverter Topology with Minimal Switch Count and Total Harmonic Distortion

2020 ◽  
Vol 29 (11) ◽  
pp. 2050174 ◽  
Author(s):  
Kavali Janardhan ◽  
Arvind Mittal ◽  
Amit Ojha
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Lookup Table ◽  
Control Technique ◽  
Power Switches ◽  
Dspace 1104 ◽  
Working Principle

A multilevel inverter (MLI) with reduced number of power devices, especially for the higher output levels, is presented in this paper. The generalized topology for ([Formula: see text]) level MLI is developed with symmetrical isolated dc sources and ([Formula: see text]) number of switches. A five-level MLI is developed with five power switches and then by adding each one additional switch two more levels are added in the output voltage waveform. With the help of lookup table, the working principle of the proposed five-level MLI topology is explained. Sinusoidal pulse width modulation–phase disposition control technique has been used to get a minimal total harmonic distortion (THD). The proposed MLI topology is simulated on the MATLAB platform. The laboratory prototype is developed for five-level MLI, and the experimental results obtained validate the simulation studies. The dSPACE 1104 is used for generating gate pulses in case of experimentation. The output voltage and current THDs obtained are 9.20% and 4.60%, respectively; the harmonics are mitigated more with five-level inverter. The proposed topology is compared with the cascaded H-bridge multilevel inverter.

Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

scholarly journals Reduction of Total Harmonic Distortion (THD) on Multilevel Inverter with Modified PWM using Genetic Algorithm

2017 ◽  
Vol 5 (1) ◽  
pp. 91-118 ◽  
Author(s):  
Lucky Pradigta Setiya Raharja ◽  
Ony Asrarul Q. ◽  
Zainal Arief ◽  
Novie Ayub Windarko
Keyword(s):  
Genetic Algorithm ◽  
Phase Shift ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Phase Shift Angle ◽  
Harmonic Injection ◽  
Harmonic Voltage ◽  
Shift Angle

In this research, modified PWM has been applied to the multilevel inverter (MLI) single-phase three-level diode clamp full bridge. Modified PWM is performed to produce minimum Total Harmonic Distortion (THD) the voltage because the quality of the good voltage is indicated by small THD. The THD indicates the quality of AC voltage source. The THD standard by the IEEE STD 519-1992 Harmonic Voltage Limits is 5% and the Pacific Corp standard is 8%, if the THD value is greater than the THD standard it can cause the electronic load to be damaged due to the damaged waveform. Modified PWM is applied by adding a 50 Hz sinusoidal reference signal with a sinusoidal signal which has a certain amplitude, frequency and phase shift angle. The frequency of the adder signal is the frequency at which the value of the individual harmonic voltage appears (n harmonic). To get maximum result, optimization using Genetic Algorithm (GA) method to determinate amplitude & phase shift angle done. The result of implementation hardware with modified PWM shows smaller THD voltage compared to the THD voltage with Sinusoidal Pulse Width Modulation (SPWM) switching up to 0.19 or decrease 65,51 % for modified PWM of harmonic injection n = 7 with GA optimization ma= 0.8 (A=0.0936 and ø = 0 rad) and up to 0.08 or decrease 12,30 % for modified PWM of harmonic injection n = 22 with GA optimization ma = 0.4 (A=0.1221 and ø = 0 rad).

scholarly journals Symmetrical and Asymmetrical Multilevel Inverter Structures with Reduced Number of Switching Devices

2018 ◽  
Vol 11 (1) ◽  
pp. 144 ◽  
Author(s):  
M. H. Yatim ◽  
A. Ponniran ◽  
M. A. Zaini ◽  
M. S. Shaili ◽  
N. A. S. Ngamidun ◽  
...  
Keyword(s):  
Stress Reduction ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Multilevel Structure ◽  
Distortion Reduction ◽  
Switching Devices

The purpose of this study is to analyze the operation and design of symmetrical and asymmetrical multilevel inverter structures with reduced number of switching devices. In this study, the term of conventional inverter is defined as a single cascaded inverter. Specifically, the inverter operates in three complete loops and only produces 2-level and 3-level of output voltages. Usually, cascaded structure suffers from the high total harmonic distortion. Thus, by considering multilevel structure of inverter, low total harmonic distortion reduction and voltage stress reduction on switching devices can be archived. Sinusoidal pulse width modulation and modified square pulse width modulation are used as modulation techniques in switching schemes of the designed multilevel inverters. The findings indicate that, the designed multilevel structure cause low total harmonics distortion at the output voltage. Furthermore, the asymmetrical structure is producing the same output voltage levels with reduced number of switching devices compared to the symmetrical structure is experimentally confirmed. The findings show that the total harmonic distortion for 7-level (symmetrical) and 9-level (asymmetrical) are 16.45% and 15.22%, respectively.

scholarly journals A New Method of Selective Harmonic Elimination PWM for H-Bridge Cascaded Multilevel Inverter

2019 ◽  
Vol 9 (1) ◽  
pp. 6168-6175
Keyword(s):  
Degrees Of Freedom ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Voltage Range ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Cascaded Multilevel Inverter ◽  
Operating Points

The quality of power of the cascaded H-bridge multilevel inverter is affected due to harmonics. In this paper, a Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) method including controllable DC link voltage is introduced for the multilevel inverter. Novel mathematical modeling of SHE-PWM is established concerning the DC link voltage. Compared to ordinary selective harmonic elimination, the proposed method has an increased number of degrees of freedom because of its variable DC link voltage. On the other hand, the selective harmonic elimination utilizes constant DC link voltage. In the proposed scheme, the nonlinear equations are solved only once in the entire voltage range. As a result, the computational burden will decrease. Also, the Total Harmonic Distortion (THD) of the output voltage remains constant for various values of the operating points. The simulation is performed using Matlab Simulink and the comparison is performed with the conventional PWM method. It is intended that the proposed SHE-PWM based cascaded H-bridge multilevel inverter provides better performance in terms of lower-order harmonics and less THD compares to conventional PWM method.

scholarly journals Compare the Symmetric Hybridized Cascaded MLI with 17 levels with the Asymmetric Switched Capacitor MLI Topologies for Dynamic Loading

2021 ◽  
Vol 9 (VII) ◽  
pp. 1951-1958
Author(s):  
Jayesh B. Patil
Keyword(s):  
Renewable Energy ◽  
Dynamic Loading ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switched Capacitor ◽  
Matlab Simulink ◽  
Energy Applications ◽  
Load Disturbance

This article builds a symmetric hybridized cascaded a switching capacitor unit in a multilayer inverter and compares it to For 17 level inverters, A switched capacitor unit is utilized with an asymmetric multilevel inverter. In the symmetric hybridized multilevel inverter design, a In the midst of a dual-input dc source, there is a bi-directional switch is utilized to create a modified H-bridge inverter with a five-level output voltage instead of three. In the proposed scenario, In an asymmetric multilevel inverter, the switched capacitor unit substitutes the dc sources. which enlarges By a factor of two, The output voltage has been increased. and the voltage levels at the loads are increased by a factor of two. MATLAB-SIMULINK was used to verify the suggested topology using the staircase modulation approach. The findings show that multilayer inverter topologies with low total harmonic distortion, fewer switches, With greater levels of output voltage are better stable during load disturbance circumstances, making them ideal for renewable energy applications.

A Overlapping Carrier Based SPWM for a 5-Level Cascaded H-bridge Multilevel Inverter

2016 ◽  
Vol 1 (2) ◽  
pp. 221
Author(s):  
Kureve D. Teryima ◽  
Goshwe Y. Nentawe ◽  
Agbo O. David
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Switching Control ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Control Technique ◽  
Control Techniques ◽  
Multi Level

<p>This paper proposes a switching control for a cascaded H-bridge inverter structure with reduced switches which is used to improve the THD performance of a single phase five level CHB MLI. The multi level inverter is simulated for the conventional carrier overlapping APOD and the proposed carrier overlapping APOD Pulse Width Modulation (PWM) switching control technique. The total harmonic distortion (THD) of the output voltages are observed for both PWM control techniques. The performance of the symmetric CHB MLI is simulated using MATLAB-SIMULINK. It is observed that the proposed carrier overlapping APODPWM provides output with relatively low THD as compared to the conventional carrier overlapping APODPWM.</p>

scholarly journals A modified cascaded h-bridge multilevel inverter based on particle swarm optimisation (PSO) technique

2019 ◽  
Vol 16 (1) ◽  
pp. 41
Author(s):  
Mohammed Rasheed ◽  
Rosli Omar ◽  
Marizan Sulaiman ◽  
Wahidah Abd Halim
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Linear Equations ◽  
Harmonic Distortion ◽  
Particle Swarm ◽  
Multilevel Inverter ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Non Linear Equations

<span>In this paper, modified multilevel inverter, via addition of an auxiliary bidirectional switch, based on Newton Raphson (NR) and Particle Swarm Optimization (PSO) techniques is presented. The NR and PSO techniques were employed for selective harmonics elimination (SHE) solution in a modified Cascaded H Bridge Multilevel inverter (CHB-MLI). The Selective Harmonic Elimination Pulse-Width Modulation (SHE-PWM) is a powerful technique for harmonic minimization in multilevel inverter. The NR and PSO techniques were used to determine the switching angles by solving the non-linear equations of the output voltage waveform of the modified CHB-MLI in order to control the fundamental component and eliminate some low order harmonics. The proposed NR and PSO techniques are capable to minimize the Total Harmonic Distortion (THD) of the output voltage of the modified inverter within allowable limits. This paper aims to modeling and simulation by MATLAB of the modified topology of the CHB-MLI for a single-phase prototype for 13-levels. The inverter offers less THD and greater efficiency using PSO control algorithm compared with the NR algorithm. <br https://server9.kproxy.com/servlet/redirect.srv/sruj/snbzofspy/skvyzff/p1/> The performance of the proposed controllers based on NR and PSO techniques is verified through simulation.</span>

scholarly journals Control of Cascaded H-Bridge Multilevel Inverter Based on Optimum Regulation of Switching Angles, and the FPGA Implementation

2019 ◽  
Vol 3 (1) ◽  
Author(s):  
Hatef Firouzkouhi
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Fpga Implementation ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Pattern ◽  
Multi Level ◽  
Simulation Results ◽  
Polynomial Term

A new concept in control of cascaded H-Bridge multi-level inverters is proposed in this paper. According to this concept, switching angles are considered to be independent from the fundamental voltage. A polynomial term is presented to show the relation between switching angles and DC voltages. Based on this concept, Total Harmonic Distortion (THD) calculations are updated and proved to be independent from the fundamental voltage. Thus, once calculated for minimum THD, the switching pattern can be used for any required level of output voltage. To examine the effectiveness of the proposed method, it is applied in control of an eleven level inverter. The simulation results are demonstrated and verified through experiments with a setup controlled by Xilinx SPARTAN3 family FPGA (XC3S400-PQG208).

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