Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

Non-iterative Wide-modulation-index Switching-angle Calculation Techniques for 15-level Binary Cascaded H-bridge Multilevel Inverter

2017 ◽  
Vol 8 (1) ◽  
pp. 93
Author(s):  
J. A. Soo ◽  
M. S. Chye ◽  
Y. C. Tan ◽  
S. L. Ong ◽  
J. H. Leong ◽  
...  
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Geometric Approach ◽  
Multilevel Inverter ◽  
Modulation Index ◽  
Matlab Simulation ◽  
Switching Losses ◽  
Wide Range ◽  
Simulation And Experiment ◽  
Angle Calculation

Cascaded H-bridge multilevel inverter (CHBMI) is able to generate a staircase AC output voltage with low switching losses. The switching angles applied to the CHBMI have to be calculated and arranged properly in order to minimize the total harmonic distortion (THD) of the output voltage waveform. In this paper, two non-iterative switching-angle calculation techniques applied for a 15-level binary asymmetric CHBMI are proposed. Both techniques employ a geometric approach to estimate the switching angles, and therefore, the generated equations can be solved directly without iterations, which are usually time-consuming and challenging to be implemented in real-time. Apart from this, both techniques are also able to calculate the switching angles for a wide range of modulation index. The proposed calculation techniques have been validated via MATLAB simulation and experiment.

scholarly journals Solar Photovoltaic System-Based Reduced Switch Multilevel Inverter for Improved Power Quality

2022 ◽  
Vol 4 (1) ◽  
pp. 1-13
Author(s):  
Madhu Andela ◽  
Ahmmadhussain Shaik ◽  
Saicharan Beemagoni ◽  
Vishal Kurimilla ◽  
Rajagopal Veramalla ◽  
...  
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Photovoltaic System ◽  
Solar Photovoltaic ◽  
Switching Losses ◽  
Minimum Number ◽  
Multi Level ◽  
Solar Photovoltaic System

This paper deals with a reduced switch multi-level inverter for the solar photovoltaic system-based 127-level multi-level inverter. The proposed technique uses the minimum number of switches to achieve the maximum steps in staircase AC output voltage when compared to the flying capacitor multi-level inverter, cascaded type multilevel inverter and diode clamped multi-level inverter. The use of a minimum number of switches decreases the cost of the system. To eliminate the switching losses, in this topology a square wave switch is used instead of pulse width modulation. Thereby the total harmonic distortion (THD) and harmonics have been reduced in the pulsating AC output voltage waveform. The performance of 127-level MLI is compared with 15 level, 31-level and 63-level multilevel inverters. The outcomes of the solar photovoltaic system-based 127-level multi-level inverter have been simulated in a MATLAB R2009b environment.

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

scholarly journals An Enhanced H-Bridge Multilevel Inverter with Reduced THD, Conduction, and Switching Losses Using Sinusoidal Tracking Algorithm

Energies ◽  
2018 ◽  
Vol 12 (1) ◽  
pp. 81 ◽  
Author(s):  
Annamalai Thiruvengadam ◽  
Udhayakumar K
Keyword(s):  
Direct Current ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Tracking Algorithm ◽  
Multilevel Inverter ◽  
Experimental Result ◽  
Modes Of Operation ◽  
Switching Losses ◽  
Bidirectional Switches ◽  
The Relationship

In this paper, an enhanced H-Bridge multilevel inverter is proposed with the sinusoidal tracking algorithm. The proposed multilevel inverter (MLI) consists of two half H-Bridges cascaded with two unidirectional switches, n direct current (DC) sources, and (n-2) number of bi-directional switches together to form an enhanced H-Bridge (EHB) multilevel inverter. The output voltage levels of an EHB MLI depends on the number of DC sources, the number of bi-directional switches, and the relationship between the magnitude of left-side and right-side DC sources. With the addition of DC sources, bidirectional switches, and employing the sinusoidal tracking algorithm, the performance of the inverter is enhanced with features like an increased number of levels and a reduction in the total harmonic distortion and switching losses. In all the modes of operation of the proposed inverter, only three switches are “ON”, so that conduction losses are less. The proposed enhanced H-Bridge MLI is simulated using MATLAB/Simulink R2017a, and is verified with the experimental result.

A new tapped sources stack succored modified HX bridge MLI

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kannan Chandrasekaran ◽  
Nalin Kant Mohanty ◽  
Selvarasu Ranganathan
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Harmonic Distortion ◽  
Content Type ◽  
Multiple Input ◽  
Field Programmable ◽  
Simulation And Experiment ◽  
Practical Implications

Purpose Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications. Design/methodology/approach In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI. Findings The feasibility of the suggested topology is well proved by both simulation and experiment results. Practical implications This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation. Originality/value The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

A Segmented Ladder-Structured Multilevel Inverter for Switch Count Remission and Dual-Mode Savvy

2018 ◽  
Vol 27 (14) ◽  
pp. 1850223 ◽  
Author(s):  
G. Chitrakala ◽  
N. Stalin ◽  
V. Mohan
Keyword(s):  
High Power ◽  
Electromagnetic Compatibility ◽  
Harmonic Distortion ◽  
Electric Utility ◽  
Multilevel Inverter ◽  
Heat Sinks ◽  
Switching Losses ◽  
Gate Driver ◽  
Protection Circuits ◽  
Switch Voltage

The multilevel inverter (MLI) has ascertained its gravity in high-power applications for the past three decades through perennial topological modifications from the pristine structure and development of apposite modulation strategies. The benefits, including subtle switch voltage stress, reduced output voltage total harmonic distortion (THD), tolerable electromagnetic compatibility (EMC), minimal switching losses and [Formula: see text]/[Formula: see text] stress, have prepared it as a very promising candidate in high-power drives and electric utility applications. Meanwhile, MLI has few drawbacks such as higher number of switches with associated peripherals (gate driver circuits, protection circuits and heat sinks) which makes the overall system complex, bulky and costly. There have been many attempts to curb the component count in MLI structure. In this paper, a new topology is developed with a perspective to wane the switch count, which also has the ability of working in both symmetrical and asymmetrical modes. The performance of the proposed segmented ladder-structured MLI (SLSMLI) topology is substantiated with simulation study and experimentation.

An Optimization Harmonic Elimination Control Technique for Cascade Multilevel Inverter

2012 ◽  
Vol 229-231 ◽  
pp. 2380-2384
Author(s):  
Bing Yi Wang ◽  
Shuang Zhai ◽  
Xiao Qian Zhu
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Control Technique ◽  
Harmonic Elimination ◽  
Simulation And Experiment ◽  
Distortion Rate ◽  
Frequency Harmonic

In order to improve the quality of cascade multilevel inverter’s output voltage, this paper introduces an optimization harmonic elimination control technique. The harmonic of cascade multilevel inverter is controlled by the switch angels of inverter units. Through this technique, switch angels eliminate the low and middle frequency harmonic compositions and at the same time make total harmonic distortion rate of cascade multilevel inverter low are found. The correctness and accuracy of optimization harmonic elimination control technique are validated by simulation and experiment model.

scholarly journals Micro controller based asymmetrical multilevel inverter

2019 ◽  
Vol 8 (1) ◽  
pp. 18
Author(s):  
Arun V. ◽  
Prabaharan N.
Keyword(s):  
Real Time ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Scheme ◽  
High Quality ◽  
Multilevel Inverters ◽  
Switching Losses ◽  
Embedded Controller

This paper presents the Asymmetrical multilevel inverter with 1:3 voltage propagation. Switching pulse for Asymmetrical multilevel inverter are generated using embedded controller in m-file using MATLAB. The Asymmetrical multilevel inverter with 1:3 voltage propagation can produce high quality output voltage with less number of switches and voltage sources compare to conventional multilevel inverters. Contrasting other switching schemes, the proposed Switching scheme significantly reduces the Total Harmonic Distortion (THD) and minimize switching losses and reduces the complexity. To evaluate the developed scheme, simulations are carried out through MATLAB and real time implementations are done through microcontroller ARM Cortex™-M0 Core. The simulation and hardware results are presented.

Prediction of a New Cascaded Hybrid Multilevel Inverter with Less Device Count

2016 ◽  
Vol 1 (2) ◽  
pp. 273
Author(s):  
C.R. Balamurugan ◽  
S.P. Natarajan ◽  
R. Bensraj
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Phase Voltage ◽  
Power Devices ◽  
Line Voltage ◽  
Multilevel Inverters ◽  
Switching Losses ◽  
Voltage Stress ◽  
Low Distortion

<p>Multilevel inverters have been opted for high power applications due to reduced harmonic distortion, less device voltage stress and modular structure. This work proposes new modified hybrid H-bridge multilevel inverter using auxiliary switch. This proposed inverter produces five levels output with five power devices and clamping diodes as a phase voltage and nine levels as a line voltage.The levels of the inverters are decided based on the phase voltage not on the line voltage. In this paper the performance of the proposed inverter are measured in terms of line voltage. However, by increase in the number of levels the proposed inverter with reduced number of switches produces low switching losses and improves the efficiency of the inverter. This method achieves the variation of Total Harmonic Distortion (THD) in the inverter and output voltage is observed for various modulation indices. Simulation is performed using MATLAB-SIMULINK for line to line output voltage. Variable Amplitude Phase Disposition (VAPD) strategy provides output with relatively low distortion for all the strategies. It is also seen that VAPOD is found to perform better for all strategies since it provides relatively higher fundamental RMS output voltage.</p>

Performance Analysis of Multilevel Inverter with Reduced Number of Switches

2019 ◽  
Vol 16 (2) ◽  
pp. 422-427
Author(s):  
S. Karthikeyan ◽  
K. Lakshmi ◽  
S. Sivaranjani ◽  
J. Karthika ◽  
T. Nandhakumar
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Power Semiconductor ◽  
Multilevel Inverters ◽  
Modulation Control

Multilevel inverters are mainly used in high power and medium voltage applications to reduce the required voltage rating of the power semiconductor switching devices. Nowadays multilevel inverters are also preferred for various applications regardless of the power ratings because they can essentially realize lower harmonics with lower switching frequency and lower electromagnetic interference (EMI). However, it has some disadvantages such as increased number of components, complex Pulse Width Modulation control method, and voltage balancing problem. In this paper a new topology of cascaded multilevel inverter using reduced number of switches is introduced resulting in higher output voltage levels. There era five series connected H-bridges and the DC voltage is given in the ratio n0: n: n3:2n2:10n. The output voltage having 123 levels is obtained (61 positive voltage levels, 61 negative voltage levels and zero voltage levels). Reduced Total Harmonic Distortion (THD) makes them useful for electric vehicle, FACTS and has given option for various power applications. The proposed topology results in reduction of cost and has simplicity of control system. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels.

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