semiconductor memory
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2022 ◽  
pp. 2101103
Author(s):  
Peter D. Hodgson ◽  
Dominic Lane ◽  
Peter J. Carrington ◽  
Evangelia Delli ◽  
Richard Beanland ◽  
...  

2021 ◽  
Vol 22 (3) ◽  
pp. 365-385
Author(s):  
Honghong Zhang ◽  
Guoguo Zhang

The development of computer external storage has undergone the continuous change of perforated cassettes, tapes, floppy disks, hard disks, optical disks and flash disks. Internal memory has gone through the development of drum storage, Williams tube, mercury delay line, and magnetic core storage, until the emergence of semiconductor memory. Later RAM and ROM were born. RAM was divided into DRAM and SRAM. Due to its structure and cost advantages, DRAM has gradually developed into the widely used DDR series. At the same time, the low-power LPDDR series has also been advancing. At present, with the development of NVRAM technology, non-volatile random access memory with both internal and external storage functions is born. Dual-space storage based on NVRAM combines internal and external storage into one, and large capacity dual-space storage has become the development trend of storage.  


2021 ◽  
pp. 189-217
Author(s):  
A. Kaur

Nanotechnology, when this word comes in mind, it gives deep thought of new development in communication, medical science, intelligent transport system and many more. Ferrites nanoparticles have great significance owing to their amazing chemical and physical properties. In modern era we are developing materials for microwave applications and communication devices. Before the discovery of semiconductor memory chips, ferrites were the major form for electronic memory used in computers. Scientist have been studying and working with nanoparticles in magnetically guided drug delivery. The reactivity of material increases by the use of nanoparticles of that material. The dielectric characteristics of ferrites lean on diverse factors for instance methods of preparations and chemical composition. In various studies it has been found that their conductivity has dependence on temperature, composition and frequency. Among the various kinds of ferrites, Ni–Zn ferrites are viewed as the most adaptable ferrites as a result of their novel characteristics for applications at high frequency. The Ni-Zn ferrites are exploited as core materials in a variety of EM devices as well as have broad range of industrial applications e.g. inductors, microwave devices, power supplies, high and low frequency transformer cores, electromagnetic interference (EMI) suppressions and antenna rods. These broad ranges of applications are owing to their high resistivity, low eddy currents, high saturation magnetization, chemical stability and high Curie temperature. In view of this, the present chapter deals with the research progress on nickel-zinc ferrites in the bulk as well as nano size.


2021 ◽  
Author(s):  
Peter Hodgson ◽  
Dominic Lane ◽  
Peter Carrington ◽  
Evangelia Delli ◽  
Richard Beanland ◽  
...  

Abstract ULTRARAM is a non-volatile memory with the potential to achieve fast, ultralow-energy electron storage in a floating gate accessed through a triple-barrier resonant tunneling heterostructure. Here we report its implementation on a Si substrate; a vital step towards cost-effective mass production. Sample growth using molecular beam epitaxy commenced with deposition of an AlSb nucleation layer to seed the growth of a GaSb buffer layer, followed by the III-V memory epilayers. Fabricated single-cell memories show clear 0/1 logic-state contrast after ≤10-ms duration program/erase pulses of ~2.5 V, a remarkably fast switching speed for 10- and 20-µm devices. Furthermore, the combination of low voltage and small device capacitance per unit area results in a switching energy that is orders of magnitude lower than dynamic random access memory and flash, for a given cell size. Extended testing of devices revealed retention in excess of 1000 years, and degradation-free endurance of over 107 program/erase cycles, surpassing very recent results for similar devices on GaAs substrates.


Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1954
Author(s):  
Chen Wang ◽  
Xiuli Zhao ◽  
Hao Liu ◽  
Xin Chao ◽  
Hao Zhu ◽  
...  

Despite the continuous downscaling of complementary metal–oxide–semiconductor (CMOS) devices, various scenarios of technology have also been proposed toward the shrinking of semiconductor memory. In this paper, a high-density memory (HDM) has been proposed on the basis of band-to-band tunneling (BTBT) for low-power, high density, and high-speed memory applications. The geometric structure and electrical properties have been demonstrated by using TCAD tools. Typical memory operations including read, program, and erase have been designed and performed. High operation speed, lower power consumption, as well as good reliability characteristics have been achieved by simulation, which indicates that the HDM may have potential application value as a novel semiconductor memory device.


Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1759
Author(s):  
Akinobu Teramoto

Methods for evaluating low-frequency noise, such as 1/f noise and random telegraph noise, and evaluation results are described. Variability and fluctuation are critical in miniaturized semiconductor devices because signal voltage must be reduced in such devices. Especially, the signal voltage in multi-bit memories must be small. One of the most serious issues in metal-oxide-semiconductor field-effect-transistors (MOSFETs) is low-frequency noise, which occurs when the signal current flows at the interface of different materials, such as SiO2/Si. Variability of low-frequency noise increases with MOSFET shrinkage. To assess the effect of this noise on MOSFETs, we must first understand their characteristics statistically, and then, sufficient samples must be accurately evaluated in a short period. This study compares statistical evaluation methods of low-frequency noise to the trend of conventional evaluation methods, and this study’s findings are presented.


2021 ◽  
Author(s):  
Peter Hodgson ◽  
Dominic Lane ◽  
Peter Carrington ◽  
Evangelia Delli ◽  
Richard Beanland ◽  
...  

Abstract ULTRARAM™ is a non-volatile memory with the potential to achieve fast, ultra-low-energy electron storage in a floating gate accessed through a triple-barrier resonant tunnelling heterostructure. Here we report the implementation of ULTRARAM™ on a Si substrate; a vital step towards cost-effective mass production. Sample growth was carried out using molecular beam epitaxy, by first depositing an AlSb nucleation layer to seed the growth of a GaSb buffer layer, followed by the III-V memory epilayers. Fabricated single-cell memories show clear 0/1 logic-state contrast after ≤10-ms duration program/erase pulses of ~2.5 V, a remarkably fast switching speed for 10- and 20-µm devices. Furthermore, the combination of low voltage and small device capacitance per unit area results in a switching energy that is orders of magnitude lower than dynamic random access memory and flash, for a given cell size. Extended testing of the devices revealed retention in excess of 1000 years and degradation-free endurance of over 107 program/erase cycles, exceeding very recent results for similar devices on GaAs substrates.


Author(s):  
Jitendra Kumar Mishra ◽  
Lakshmi Likhitha Mankali ◽  
Kavindra Kandpal ◽  
Prasanna Kumar Misra ◽  
Manish Goswami

The present day electronic gadgets have semiconductor memory devices to store data. The static random access memory (SRAM) is a volatile memory, often preferred over dynamic random access memory (DRAM) due to higher speed and lower power dissipation. However, at scaling down of technology node, the leakage current in SRAM often increases and degrades its performance. To address this, the voltage scaling is preferred which subsequently affects the stability and delay of SRAM. This paper therefore presents a negative bit-line (NBL) write assist circuit which is used for enhancing the write ability while a separate (isolated) read buffer circuit is used for improving the read stability. In addition to this, the proposed design uses a tail (stack) transistor to decrease the overall static power dissipation and also to maintain the hold stability. The comparison of the proposed design has been done with state-of-the-art work in terms of write static noise margin (WSNM), write delay, read static noise margin (RSNM) and other parameters. It has been observed that there is an improvement of 48%, 11%, 19% and 32.4% in WSNM while reduction of 33%, 39%, 48% and 22% in write delay as compared to the conventional 6T SRAM cell, NBL, [Formula: see text] collapse and 9T UV SRAM, respectively.


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