Key Parameter Optimization in Wave Soldering

2011 ◽  
Vol 323 ◽  
pp. 84-88 ◽  
Author(s):  
Wan Gang Wang ◽  
Yong Peng ◽  
Xiao Ping Wang

Wave soldering is mainly used in electronic assembling process of traditional through-hole cartridge printed-circuit board and hybrid packaged process combining surface mounting with through-hole cartridge components. Compared with manual welding, wave soldering has advantages of high productive efficiency, good welding quality and high reliability. Wave soldering process is a complex and systematic project. During the practical productive process, flux coating quantity, preheat temperature of printed board, soldering temperature and time, uphill height of printed board and peak height should be strictly controlled and its process parameter should be comprehensively regulated in order to achieve better soldering quality.

2014 ◽  
Vol 874 ◽  
pp. 139-143 ◽  
Author(s):  
Jacek Pietraszek ◽  
Aneta Gądek-Moszczak ◽  
Tomasz Toruński

PartnerTech provides printed circuit board (PCB) assembly on request. Wired elements are assembled in through-hole technology and soldered on the wave soldering machine. The PCB with inserted elements is passed across the pumped wave of melted solder. Typically this process is accompanied by some class of defects like cracks, cavities, wrong solder thickness and poor conductor. In PartnerTech Ltd. another type of defects was observed: dispersion of small droplets of solder around holes. Quality assurance department plans to optimize the process in order to reduce the number of defects. In the first stage, it was necessary to develop a methodology for counting defects. This paper presents experimental design and analysis related to this project.


2014 ◽  
Vol 26 (4) ◽  
pp. 194-202 ◽  
Author(s):  
Helene Conseil ◽  
Morten Stendahl Jellesen ◽  
Rajan Ambat

Purpose – The purpose of this paper was to analyse typical printed circuit board assemblies (PCBAs) processed by reflow, wave or selective wave soldering for typical levels of process-related residues, resulting from a specific or combination of soldering processes. Typical solder flux residue distribution pattern, composition and concentration are profiled and reported. The effect of such contaminants on conformal coating was tested. Design/methodology/approach – Presence of localized flux residues was visualized using a commercial residue reliability assessment testing gel test and chemical structure was identified by Fourier transform infrared spectroscopy, while the concentration was measured using ion chromatography, and the electrical properties of the extracts were determined by measuring the leak current using a twin platinum electrode set-up. Localized extraction of residue was carried out using a commercial critical contamination control extraction system. Findings – Results clearly show that the amount and distribution of flux residues are a function of the soldering process, and the level can be reduced by an appropriate cleaning. Selective soldering process generates significantly higher levels of residues compared to the wave and reflow process. For conformal coated PCBAs, the contamination levels generated from the tested wave and selective soldering process are found to be enough to generate blisters under exposure to high humidity levels. Originality/value – Although it is generally known that different soldering processes can introduce contamination on the PCBA surface, compromising its cleanliness, no systematic work is reported investigating the relative levels of residue introduced by various soldering processes and its effect on corrosion reliability.


2014 ◽  
Vol 6 ◽  
pp. 275735 ◽  
Author(s):  
M. S. Abdul Aziz ◽  
M. Z. Abdullah ◽  
C. Y. Khor ◽  
Z. M. Fairuz ◽  
A. M. Iqbal ◽  
...  

An effective simulation approach is introduced in this paper to study the thermal fluid-structure interaction (thermal FSI) on the effect of pin-through-hole (PTH) diameter on the wave soldering zone. A 3D single PTH connector and a printed circuit board model were constructed to investigate the capillary flow behavior when passing through molten solder (63SnPb37). In the analysis, the fluid solver FLUENT was used to solve and track the molten solder advancement using the volume of fluid technique. The structural solver ABAQUS was used to examine the von Mises stress and displacement of the PTH connector in the wave soldering process. Both solvers were coupled by MpCCI software. The effects of six different diameter ratios (0.1 < d/ D < 0.97) were studied through a simulation modeling. The use of ratio d/ D = 0.2 yielded a balanced filling profile and low thermal stress. Results revealed that filling level, temperature, and displacement exhibited polynomial behavior to d/ D. Stress of pin varied quadratically with the d/ D. The predicted molten solder profile was validated by experimental results. The simulation results are expected to provide better visualization and understanding of the wave soldering process by considering the aspects of thermal FSI.


2021 ◽  
Vol 26 (5) ◽  
pp. 426-431
Author(s):  
V.A. Sergeev ◽  
◽  
A.M. Khodakov ◽  
M.Yu. Salnikov ◽  
◽  
...  

Thermal methods of quality control of the plated-through hole (PTH) of printed circuit board (PCB) are based on thermal models. However, known thermal models of PTH take no account of heat transfer to PCB material thus not allowing for PTH heat characteristic tying up with adhesion quality. In this work, an axisymmetric thermal model of a single-layer PCB PTH under one-sided heating conditions is considered. It was shown that the ratio of the temperature increments of the upper (heated) and lower end of the PTH in the considered range of heating power does not depend on the power level. A linear thermal equivalent scheme of the PTH has been proposed, which includes the longitudinal thermal resistance of the PTH metallization, de-termined by the parameters and quality of the metallization layer, the thermal resistance, which determines the convection heat exchange between the ends of the PTH with the adjacent PCB surface and the environment, and the thermal resistance of the area of the PCB material adjacent to the PTH, depending on the quality of the metallization adhesion and the PCB dielectric. Thermal equivalent circuit parameters determined by the ratio of the temperature increment of the upper and lower ends of the PTH and their difference can serve as the basis for the development of a nondestructive inspection procedure for PTH quality control by way of its unilateral heating, for example, by a laser beam.


2019 ◽  
Vol 31 (3) ◽  
pp. 169-175 ◽  
Author(s):  
Mohamed Amine Alaya ◽  
Attila Geczy ◽  
Balazs Illes ◽  
Gábor Harsányi ◽  
David Bušek

Purpose The purpose of the paper is to improve the control of vapour phase soldering (VPS). To enable better productivity and assembling quality, the industry needs to provide precise control and measurements during assembling. In the paper, a special monitoring method is presented for VPS to enable improved process control and oven state identification. Design/methodology/approach The work presents the investigation of the workspace with dynamic and gage type pressure sensors in fusion with thermocouples. Different sensors were evaluated to find an appropriate type. The relation between the temperature and the pressure was investigated, according to the setup of the oven. The effect of inserting a printed circuit board (PCB) on the pressure of the vapour inside the oven was also investigated with the pressure/power functions. Findings It was found that the novel gage-type sensors enable better precision than solutions seen in previous literature. The sensors are able to monitor the decreasing vapour concentration when a PCB is inserted to the workspace. It was found that there is a suggested minimum power to sustain a well-developed vapour column for soldering in saturated vapour. An inflexion point highlights this in the pressure/power function, in accordance with the temperature/power curve. Originality/value The research presents original works with aspects of a novel sensor fusion concept and work space monitoring for better process control and improved soldering quality.


2015 ◽  
Vol 69 (3) ◽  
pp. 295-310
Author(s):  
M. S. Abdul Aziz ◽  
M. Z. Abdullah ◽  
C. Y. Khor ◽  
A. Jalar ◽  
F. Che Ani ◽  
...  

Author(s):  
Reza Ghaffarian

Commercial-off-the-shelf column/ball grid array packaging (COTS CGA/BGA) technologies in high-reliability versions are now being considered for use in high-reliability electronic systems. For space applications, these packages are prone to early failure due to the severe thermal cycling in ground testing and during flight, mechanical shock and vibration of launch, as well as other less severe conditions, such as mechanical loading during descent, rough terrain mobility, handling, and ground tests. As the density of these packages increases and the size of solder interconnections decreases, susceptibility to thermal, mechanical loading and cycling fatigue grows even more. This paper reviews technology as well as thermo-mechanical reliability of field programmable gate array (FPGA) IC packaging developed to meet demands of high processing powers. The FPGAs that generally come in CGA/PBGA packages now have more than thousands of solder balls/columns under the package area. These packages need not only to be correctly joined onto printed circuit board (PCB) for interfacing; they also should show adequate system reliability for meeting thermo-mechanical requirements of the electronics hardware application. Such reliability test data are rare or none for harsher environmental applications, especially for CGAs having more than a thousand of columns. The paper also presents significant test data gathered under thermal cycling and drop testing for high I/O PBGA/CGA packages assembled onto PCBs. Damage and failures of these assemblies after environmental exposures are presented in detail. Understanding the key design parameters and failure mechanisms under thermal and mechanical conditions is critical to developing an approach that will minimize future failures and will enable low-risk insertion of these advanced electronic packages with high processing power and in-field re-programming capability.


Sign in / Sign up

Export Citation Format

Share Document