A Novel Three Phase Cascaded Multilevel Inverter

2013 ◽  
Vol 646 ◽  
pp. 249-258
Author(s):  
Sheng Wang ◽  
Jia Hua Zhong ◽  
Shao Dong Wang ◽  
Jin Ping He

Based on the theory of H-bridge multilevel converter, the structure of a three phase cascaded multilevel inverter (LVCMI) and its control strategy are proposed in this paper. Several standard three-phase bridges can be reconnected into a new single three-phase bridge at ac-side. Simulation results show that such topological structure can increase the output voltage capacity and reduce the THD. It can be used as an inverter or rectifier in three phase system. In theory, it can be cascaded unlimitedly. The more cascaded, the higher output voltage and the lower THD. Experimental results of LVCMI with 3-module verified the feasibility of the proposed inverter.

2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).


Author(s):  
Hemalatha Javvaji ◽  
Basavaraja Banakara

This paper proposes a Hybridized Symmetric Cascaded Multilevel Inverter for voltage levels ranging from 5 levels to 17 levels. The proposed Multi Level Inverter (MLI) topology is built using a modified H-bridge inverter that results in an increased output voltage levels with a smaller number of solid-state switches. This technique enhances the h-bridge configuration from three level to five level by means of a bi-directional switch at source. Gating pulses of hybridized symmetric MLI are generated through staircase modulation. The operation and performance of the proposed topology is tested for different output voltage levels, simulation results prove that the proposed technique results in less THD at all levels with lesser power consumption and are easily applicable for renewable energy applications.


2019 ◽  
Vol 29 (08) ◽  
pp. 2050117
Author(s):  
Madan Kumar Das ◽  
Akanksha Sinha ◽  
Kartick Chandra Jana

A novel asymmetrical nine-level inverter topology using only six switches along with its generalized structure are presented in this paper. The proposed reduced switch multilevel inverter topology makes use of a lower total standing voltage for a required output voltage as compared to the existing ones. One of the major advantages of the proposed multilevel inverter over other existing topologies is that, the circuit can be extended to a higher-level inverter, by cascading a few proposed inverter modules and can also be extended to the three-phase structure very easily, thereby making the inverter structure simple. In addition to this, the proposed inverter module does not require any additional H-bridge circuit to obtain the negative voltage levels for AC voltage, resulting in reduced voltage stress on the switches. This paper also incorporates an effective technique to determine the total standing voltage as well as the switching and conduction losses of the inverter. The MATLAB/Simulink based proposed nine-level as well as an 81-level inverters are modeled and the simulation results are presented. An experimental prototype of nine-level inverter using six switches is developed and tested to validate the simulation results.


2016 ◽  
Vol 24 (8) ◽  
pp. 1440-1454 ◽  
Author(s):  
R Geetha ◽  
M Ramaswamy

The paper develops a new topology for a three phase multilevel inverter with a view to reduce the number of switches in the path of the current. It encompasses a mechanism to reach the desired target voltage and in turn enable the three phase induction motor to operate at the specified speed. The formulation incorporates the theory of an appropriate pulse width modulation strategy to ensure the elimination of higher frequency components of the output voltage. The use of relatively smaller number of carriers in the process of generating the switching pulses serves to enhance the output voltage spectrum. The intriguing merits of the phase disposition over the other modulation schemes enable to arrive at a nearly sinusoidal voltage. The performance obtained from the prototype substantiate the MATLAB based simulation results and establish the ability of the series parallel switched multilevel inverter topology to offer an improved performance for the induction motor.


Author(s):  
Chinmayi Srikanth ◽  
Shivaleelavathi B G

<span>The multi carrier modulation technique is the most employed   PWM technique for cascaded multilevel inverter (CMLI) since this control strategy can be easily extended to higher number of levels of output compared to space vector PWM technique. This paper proposes a modified multi carrier PWM technique for three-phase CMLI. The proposed PWM technique has been implemented using MATLAB Xilinx System Generator, which automatically generate code from system model. The hardware implementation of the three-phase CMLI has been carried out to substantiate the working of proposed PWM technique. Novel FPGA Wavect digital controller is used to generate the PWM pulses, which is a real time simulator and controller. This digital controller improves the accuracy of the hardware implementation. Hardware implementation of proposed control strategy for three-phase CMLI with RL load proves that the proposed PWM technique results in improved power output quality with reduced harmonic components.</span>


2018 ◽  
Vol 7 (4.38) ◽  
pp. 7
Author(s):  
Rupali Mohanty ◽  
Debashis Chatterjee ◽  
Gopinath Sengupta

This paper focusing on, the total harmonics distortion (THD) of the output voltage is minimized by the help of a cascade multilevel inverter with non-equal DC sources using particle swarm optimization (PSO) algorithm.  The nonlinear transcendental equation that describing the harmonic elimination problem is solved by using many methods existing in literature. In the proposed technique, unequal DC sources are taken for the multilevel inverter, which is practical when different renewable sources are used. The desired switching angles are found out by implementing PSO algorithm which results the minimum THD. Experimental details along with simulation results of 11-level inverter are shown to validate the theory. 


2013 ◽  
Vol 860-863 ◽  
pp. 2378-2381
Author(s):  
Ting Ting Dong ◽  
Jiu He Wang ◽  
Xian Qin Ma

The PBHC (Passivity Based Hybrid Controller, PBHC) with damping injection and neutral point potential balance was based on a dual-EL (Euler Lagrange, EL) model of three-level three-phase dual load NPC (Neutral Point Clamped, NPC) VSR (Voltage Source Rectifier, VSR) in dq reference frame. The simulation results from Matlab/Simulink show that the proposed control strategy has excellent performances: at the AC side, the THD (Total Harmonious Distortion, THD) is less than 5%, the PF (Power Factor, PF) is higher than 98%; at the DC side, the output voltage is able to track the desired voltage quickly, the capacitors votages are equal.


2021 ◽  
Vol 261 ◽  
pp. 02039
Author(s):  
Chuanliang Fang ◽  
Guochu Chen

This paper mainly introduces the Modular Multilevel Converter (MMC) topology structure, simple analysis of the working principle of MMC, deduced the mathematical model of MMC. The precharging control strategy of MMC sub-module (SM) is studied, and the charging process is divided into uncontrollable charging stage and controllable charging stage. For the uncontrollable charging stage, an improved DC side pre-charging method is proposed, and a five-level simulation model of voltage-type MMC is established in the Matlab/Simulink simulation environment, and the simulation results of the system are comprehensively analyzed.


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