scholarly journals Non-conventional Cascade Multilevel Inverter with Lower Number of Switches by Using Multilevel PWM

2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).

Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi

The multi level inverter system is habitually exploited in AC drives, when both reduced harmonic contents and high power are required. In this paper, a new topology for three phase asymmetrical multilevel inverter employing reduced number of switches is introduced. With less number of switches, the cost, space and weight of the circuit are automatically reduced. This paper discusses the new topology, the switching strategies and the operational principles of the chosen inverter. Simulation is carried out using MATLAB-SIMULINK. Various conventional PWM techniques that are appropriate to the chosen circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM are employed in this work. COPWM technique affords the less THD value and also affords a higher fundamental RMS output voltage.


2019 ◽  
Vol 16 (1) ◽  
pp. 18 ◽  
Author(s):  
Thiyagarajan V ◽  
Somasundaran P

Multilevel inverter plays an important role in the field of modern power electronics and is widely being used for many high voltage and high power industrial and commercial applications. The objective of this paper is to design and simulate the modified asymmetric multilevel inverter topology with reduced number of switches. The proposed inverter topology synthesizes 21-level output voltage during symmetric operation using three DC voltage sources and twelve switches 8 main switches and 4 auxiliary switches. The different methods of calculating the switching angles are presented in this paper. The MATLAB/Simulink software is used to simulate the proposed inverter. The performance of the proposed inverter is analyzed and the corresponding simulation results are presented in this paper.


Author(s):  
Hemalatha Javvaji ◽  
Basavaraja Banakara

This paper proposes a Hybridized Symmetric Cascaded Multilevel Inverter for voltage levels ranging from 5 levels to 17 levels. The proposed Multi Level Inverter (MLI) topology is built using a modified H-bridge inverter that results in an increased output voltage levels with a smaller number of solid-state switches. This technique enhances the h-bridge configuration from three level to five level by means of a bi-directional switch at source. Gating pulses of hybridized symmetric MLI are generated through staircase modulation. The operation and performance of the proposed topology is tested for different output voltage levels, simulation results prove that the proposed technique results in less THD at all levels with lesser power consumption and are easily applicable for renewable energy applications.


2019 ◽  
Vol 29 (08) ◽  
pp. 2050117
Author(s):  
Madan Kumar Das ◽  
Akanksha Sinha ◽  
Kartick Chandra Jana

A novel asymmetrical nine-level inverter topology using only six switches along with its generalized structure are presented in this paper. The proposed reduced switch multilevel inverter topology makes use of a lower total standing voltage for a required output voltage as compared to the existing ones. One of the major advantages of the proposed multilevel inverter over other existing topologies is that, the circuit can be extended to a higher-level inverter, by cascading a few proposed inverter modules and can also be extended to the three-phase structure very easily, thereby making the inverter structure simple. In addition to this, the proposed inverter module does not require any additional H-bridge circuit to obtain the negative voltage levels for AC voltage, resulting in reduced voltage stress on the switches. This paper also incorporates an effective technique to determine the total standing voltage as well as the switching and conduction losses of the inverter. The MATLAB/Simulink based proposed nine-level as well as an 81-level inverters are modeled and the simulation results are presented. An experimental prototype of nine-level inverter using six switches is developed and tested to validate the simulation results.


2012 ◽  
Vol 433-440 ◽  
pp. 6038-6042
Author(s):  
Li Ping Shi ◽  
Zheng Da Wang ◽  
Ya Jing Hu

Multi-level inverter can output high voltage directly and can be connected without transformer, so it is applied more and more widely in high power situation. This paper presents a cascade H bridge seven-level parallel active power filter. This paper analyzes the principle of cascade H bridge multi-level inverter, designs a cascade H bridge seven-level SAPF based on CPS-SPWM, and the principle and the effect are simulated. The simulation results show that this system can compensate load harmonic current.


2016 ◽  
Vol 24 (8) ◽  
pp. 1440-1454 ◽  
Author(s):  
R Geetha ◽  
M Ramaswamy

The paper develops a new topology for a three phase multilevel inverter with a view to reduce the number of switches in the path of the current. It encompasses a mechanism to reach the desired target voltage and in turn enable the three phase induction motor to operate at the specified speed. The formulation incorporates the theory of an appropriate pulse width modulation strategy to ensure the elimination of higher frequency components of the output voltage. The use of relatively smaller number of carriers in the process of generating the switching pulses serves to enhance the output voltage spectrum. The intriguing merits of the phase disposition over the other modulation schemes enable to arrive at a nearly sinusoidal voltage. The performance obtained from the prototype substantiate the MATLAB based simulation results and establish the ability of the series parallel switched multilevel inverter topology to offer an improved performance for the induction motor.


This paper presents a 5 level T-type multilevel inverter, to improve the performance of the hybrid system and then improved voltage is injected into the grid. Two three level inverter with common emitter and common collector configurations are combined to obtain a five level inverter. PV and wind energy is used as a source of energy to the five level T-type MLI. It has advantages such as low switching losses, lesser THD, less filter requirement and superior output quality when compared to 3-level T-type MLI. PWM technique is employed to generate output voltage. The Simulation is done using MATLAB Simulink.


Author(s):  
Hatef Firouzkouhi

A new concept in control of cascaded H-Bridge multi-level inverters is proposed in this paper. According to this concept, switching angles are considered to be independent from the fundamental voltage. A polynomial term is presented to show the relation between switching angles and DC voltages. Based on this concept, Total Harmonic Distortion (THD) calculations are updated and proved to be independent from the fundamental voltage. Thus, once calculated for minimum THD, the switching pattern can be used for any required level of output voltage. To examine the effectiveness of the proposed method, it is applied in control of an eleven level inverter. The simulation results are demonstrated and verified through experiments with a setup controlled by Xilinx SPARTAN3 family FPGA (XC3S400-PQG208).


Author(s):  
C.R. Balamurugan ◽  
S.P. Natarajan ◽  
R. Bensraj

<p>The multi level inverter system is mostly used in ac drives, when both reduced harmonic contents and high power are required. In this paper a new topology of multilevel inverter is introduced. This type has many steps with less power electronic switches. Due to the less number of switches the cost of the inverter is very less and also less installation area is required. Firstly, we describe briefly the structural parts of the inverter then switching strategy and operational principles of the proposed inverter are explained and operational topologies are given. Simulation is performed using MATLAB SIMULINK. Various PWM techniques are applied to the circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM. By comparing among the PWM techniques, PODPWM provide the less THD value and COPWM provide a higher fundamental RMS output voltage.</p><p> </p>


Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
R. Bensaraj

<p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>


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