New series parallel switched multilevel inverter for a three phase induction motor

2016 ◽  
Vol 24 (8) ◽  
pp. 1440-1454 ◽  
Author(s):  
R Geetha ◽  
M Ramaswamy

The paper develops a new topology for a three phase multilevel inverter with a view to reduce the number of switches in the path of the current. It encompasses a mechanism to reach the desired target voltage and in turn enable the three phase induction motor to operate at the specified speed. The formulation incorporates the theory of an appropriate pulse width modulation strategy to ensure the elimination of higher frequency components of the output voltage. The use of relatively smaller number of carriers in the process of generating the switching pulses serves to enhance the output voltage spectrum. The intriguing merits of the phase disposition over the other modulation schemes enable to arrive at a nearly sinusoidal voltage. The performance obtained from the prototype substantiate the MATLAB based simulation results and establish the ability of the series parallel switched multilevel inverter topology to offer an improved performance for the induction motor.

2019 ◽  
Vol 29 (08) ◽  
pp. 2050117
Author(s):  
Madan Kumar Das ◽  
Akanksha Sinha ◽  
Kartick Chandra Jana

A novel asymmetrical nine-level inverter topology using only six switches along with its generalized structure are presented in this paper. The proposed reduced switch multilevel inverter topology makes use of a lower total standing voltage for a required output voltage as compared to the existing ones. One of the major advantages of the proposed multilevel inverter over other existing topologies is that, the circuit can be extended to a higher-level inverter, by cascading a few proposed inverter modules and can also be extended to the three-phase structure very easily, thereby making the inverter structure simple. In addition to this, the proposed inverter module does not require any additional H-bridge circuit to obtain the negative voltage levels for AC voltage, resulting in reduced voltage stress on the switches. This paper also incorporates an effective technique to determine the total standing voltage as well as the switching and conduction losses of the inverter. The MATLAB/Simulink based proposed nine-level as well as an 81-level inverters are modeled and the simulation results are presented. An experimental prototype of nine-level inverter using six switches is developed and tested to validate the simulation results.


This work explores a novel multilevel inverter (MLI) topology to minimize the number of power switches in the passage of current to accomplish each level of the output voltage. The unequal magnitudes of the dc voltage sources in attempt to realize higher levels of the output voltage bring in the asymmetrical nature of operation. It involves a series parallel switched configuration with bidirectional switches to avert the flow of circulating current in between the two H - bridges in each phase of the MLI. The effort incites to use the theory of a new Pulse Width Modulation (PWM) strategy for mitigating the higher frequency components of the voltage applied to the stator. It imbibes the Phase Disposition (PD) principles in the modulating strategy for arriving at the sinusoidal shape for the output voltage . Total Harmonic Distortion (THD) indexed by lower values for the output voltage over the traditional firing scheme serves to be the highlight for the MLI in acclaiming its place in the inverter world. The results obtained through MATLAB based simulation over a range of modulation indices. The performance measured in terms of the THD claims its suitability for use in Induction Motor (IM) drives.


2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).


Author(s):  
G. Vijaykrishna ◽  
Y. Kusumalatha

This paper examines how a Reversing voltage multilevel inverter (RVMLI) strategy is enforced to develop multilevel inverter fulfilment. This approach has been used SPWM-PD technique to regulate the electrical inverter. It desires numerous less range of carrier signals to deliver gate pulses of switches. Increasing within the levels during this strategy aid in reduction of output voltage harmonics expeditiously and improves power quality at output of the electrical inverter. It wants a lowered quantity of total switches, which is in a position to decreases of switching losses in this process. The Three-phase reversing voltage multilevel inverter of 7- level and 9- level is accomplished for R-load and R-L load and Three Phase Induction Motor. A reversing voltage multilevel inverter of 7- level and 9- level simulation is intended and developed. Mat lab/Simulink outcome is awarded to validate the proposed scheme.


Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.


Author(s):  
A. Rathinam ◽  
T. Karthikeyan ◽  
K. Ramani

This paper focused with extends the knowledge in studies and analysis of a new family of diode clamp multilevel inverter for electric vehicle application. The modified new diode clamp multilevel inverter concepts is related to reducing the components utilization, which has (n-1) switching devices, (n-3) clamping diodes, (n-1)/2 DC-link sources for achieving the same voltage level of traditional topologies. The proposed system is enhanced the voltage rating and reduce the total harmonics distortion in inverter output voltage. The switching scheme of Alternatively on Opposition Disposition pulse width modulation strategies is implemented to control multilevel inverter. The proposed system reduces the components utilization which has utilizes 45% of components for achieving the same level of voltage. The modified new diode clamp multilevel inverter is coupled with induction motor and its performance is validated with three phase induction motor for variable frequency drive. The inverter topologies performance has been investigated by prototype model.


Author(s):  
Jyothi B ◽  
M.Venugopala Rao

<p>Multiphase (more than three phases) is very much popular due to their eminent features compared to conventional three-phase counter parts. In order to drive the multiphase machine, it requires same phase input w.r.t the no of phases at the output. This paper mainly focuses on five phase, because even after failure of one phase, the performance does not degraded much. Voltage source inverters (VSIs) are used to feed the induction motor. voltage source inverters (VSIs) switches are ON and OFF precisely to control the output. In order to implement harmonic waveform characteristic, carrier based PWM (pulse width modulation) is performed. By using with and without third harmonic injection machine torque is highly improved. Using MATLAB software, the simulation results are presented in the form of computer traces and high traded performance of the machine are discussed.</p>


Author(s):  
Nunsavath Susheela ◽  
Satish Kumar

<p>Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter.  This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load.  Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.</p>


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