An LED Driver Based on MCU for LCD Backlight

2013 ◽  
Vol 765-767 ◽  
pp. 2464-2468
Author(s):  
Guang Hua Chen ◽  
Gui Zhi Sheng ◽  
Feng Jiao Wang ◽  
Wen Zhou ◽  
Bin Jie Xiao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Modulation Scheme ◽  
Step Size ◽  
Led Driver ◽  
Cost Performance ◽  
Measurement Results ◽  
Joint Frequency ◽  
Frequency Pulse

in order to provide LCD backlight with multiple strings of LEDs, an LED driver based on MCU is proposed in the paper. A PWM signal is generated by the Pulse Width Modulation (PWM) module on the MCU chip, which is used to drive a DC-DC boost converter for LED power. The voltage and current of the boost circuit, along with all the channels current of LED, are measured by the Analog Digital Converter (ADC) module on the MCU chip, which are used to adjust the voltage of the boost circuit and supply comprehensive protection for the LED driver. To minimize the step size of the output voltage, the joint frequency-pulse width modulation scheme is proposed to regulate the output voltage of the boost circuit to an ideal value in the range of error, which increases the efficiency of the power. The measurement results show that the LED driver is extremely efficient and steady. Most of the output voltage step size is about 0.1V, the maximum step size is less than 0.3V. The conversion efficiency of the DC-DC converter is up to 94%. Thus the LED driver not only meets the demand of the parameter of LED, but also has high cost performance.

High‐power‐factor dimmable LED driver with low‐frequency pulse‐width modulation

2016 ◽  
Vol 9 (10) ◽  
pp. 2139-2146 ◽  
Author(s):  
Hung‐Liang Cheng ◽  
Yong‐Nong Chang ◽  
Chun‐An Cheng ◽  
Chien‐Hsuan Chang ◽  
Yu‐Hung Lin
Keyword(s):  
Power Factor ◽  
High Power ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Low Frequency ◽  
Led Driver ◽  
High Power Factor ◽  
Frequency Pulse

scholarly journals Research on Modified Hybrid Frequency Modulation Technology of Type-III Asymmetric CHB Multilevel Inverters

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 263
Author(s):  
Manyuan Ye ◽  
Wei Ren ◽  
Qiwen Wei ◽  
Guizhi Song ◽  
Zhilin Miao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Output Line ◽  
Line Voltage ◽  
Multilevel Inverters ◽  
Type Iii ◽  
Hybrid Frequency ◽  
Frequency Pulse

Asymmetric Cascaded H-bridge (ACHB) level inverters can output more voltage waveforms with fewer cascaded units while ensuring the quality of output voltage waveforms, so they have attracted more and more attention. Taking the topology of Type-III asymmetric CHB multilevel inverters as the research object, a Modified Hybrid Frequency Pulse Width Modulation (MHF-PWM) strategy is proposed in this paper. This modulation strategy overcomes the local overshoot of low-voltage unit in the presence of traditional Hybrid Frequency Pulse Width Modulation (HF-PWM), thus completely eliminating the low frequency harmonics in the output voltage waveform of Type-III ACHB nine-level inverters, and the Total Harmonic Distortion (THD) of output line voltage of the modulation strategy is lower than that of PS-PWM strategy in the whole modulation degree, which effectively improves the quality waveform of the output line voltage. At the same time, the strategy can also improve the problems of current backflow and energy feedback caused by the high-voltage unit pouring current to the low-voltage unit, thereby reducing the imbalance of the output power of the high-voltage and low-voltage units. Finally, the Matlab/Simulink simulation model and experimental platform are established to verify the validity and practicality of the modulation strategy.

scholarly journals Power Quality Improvement in Modular Multilevel Inverter Using for Different Multicarrier PWM

2021 ◽  
Vol 5 (2) ◽  
pp. 19-27
Author(s):  
Thenmalar Kaliannan ◽  
Johny Renoald Albert ◽  
D. Muhamadha Begam ◽  
P. Madhumathi
Keyword(s):  
Power Quality ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Analog Circuit ◽  
Reactive Power ◽  
Pso Algorithm ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Non Linear Load

Pulse width modulation (PWM) is a powerful technique employed in analog circuit convert with a microprocessor based digital output. Besides, Pseudo Random Multi Carrier (PRMC) involves in two random PWM strategies to minimize the harmonic order for 9- level cascaded multilevel H-bridge (CHB) inverter and 9-level Modular Multilevel inverter are introduced. The design mainly focuses on the (Pulse Width Modulation) PWM method, in which two nearest voltage levels are approached in estimated output voltage prediction based on the Partial swarm optimization (PSO) algorithm, and it conveys a random variation in the pulse position of output by Pseudo Random Multi Carrier- Pulse Width Modulation (PRMC-PWM). The CHB and the Modular inverters generate low distortion output by using PMRC. The simulation and prototype circuit are developed for the nine level output using sixteen switches and ten with Resistive-Inductive (R-L) load variation condition. The power quality is improved in CHB and Modular inverter (MoI) with minimized harmonics in various modulation index (MI) as varied from 0.1 up to 0.8. The circuit is designed by using a Field Programmable Gate Array (FPGA), Implementing a PSO algorithm for both CHB, and MoI are proposed. The comparisons of results are verified with lower order harmonics and find the best switching angle across the MLI switches. Modular inverter furthermore investigates with PRMC, Random Nearest level (RNL) modulation scheme are presented, and the proposed circuit is along with the respective degree of the output voltage were synthesized in non-linear load by the development of reactive power across a motor load.

scholarly journals Three-Phase Symmetric Cascading Z-Source Seven Levels Multilevel Inverter Excited by Multi Carrier Sinusoidal Pulse Width Modulation Scheme

2019 ◽  
Vol 8 (10) ◽  
pp. 4269-4274
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Modulation Scheme ◽  
Performance Parameters ◽  
Output Waveform ◽  
Three Phase ◽  
Sinusoidal Pulse Width Modulation ◽  
Z Sources

The Multilevel Z sources Inverter have been documented as attractive topologies used for elevated voltage adaptation. As the digit of levels improved, the synthesized set of steps output waveform have many ladder, imminent the preferred sine waveform but the major weakness of MLI be its amplitude of ac output voltage is imperfect to DC input sources voltage summing up. To conquer this drawback seven level cascading symmetric multilevel inverter based Z source inverter have been projected. This work focuses on different multi-carrier sinusoidal PWM scheme for the seven level three phase Z source symmetric cascading inverter. Performance parameters of seven level three phase Z source symmetric cascading inverter has been analyzed. A simulation circuit model of seven level three phase Z source symmetric cascading inverter urbanized using MATLAB/SIMULINK and its presentation have been urbanized.

scholarly journals Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
M. Jagabar Sathik ◽  
Dhafer J. Almakhles ◽  
N. Sandeep ◽  
Marif Daula Siddique
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Superior Performance ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Switched Capacitor ◽  
Renewable Energy Resources ◽  
High Quality ◽  
Multilevel Inverters ◽  
Blocking Voltage

AbstractMultilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter’s effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.

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