scholarly journals Research on Modified Hybrid Frequency Modulation Technology of Type-III Asymmetric CHB Multilevel Inverters

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 263
Author(s):  
Manyuan Ye ◽  
Wei Ren ◽  
Qiwen Wei ◽  
Guizhi Song ◽  
Zhilin Miao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Output Line ◽  
Line Voltage ◽  
Multilevel Inverters ◽  
Type Iii ◽  
Hybrid Frequency ◽  
Frequency Pulse

Asymmetric Cascaded H-bridge (ACHB) level inverters can output more voltage waveforms with fewer cascaded units while ensuring the quality of output voltage waveforms, so they have attracted more and more attention. Taking the topology of Type-III asymmetric CHB multilevel inverters as the research object, a Modified Hybrid Frequency Pulse Width Modulation (MHF-PWM) strategy is proposed in this paper. This modulation strategy overcomes the local overshoot of low-voltage unit in the presence of traditional Hybrid Frequency Pulse Width Modulation (HF-PWM), thus completely eliminating the low frequency harmonics in the output voltage waveform of Type-III ACHB nine-level inverters, and the Total Harmonic Distortion (THD) of output line voltage of the modulation strategy is lower than that of PS-PWM strategy in the whole modulation degree, which effectively improves the quality waveform of the output line voltage. At the same time, the strategy can also improve the problems of current backflow and energy feedback caused by the high-voltage unit pouring current to the low-voltage unit, thereby reducing the imbalance of the output power of the high-voltage and low-voltage units. Finally, the Matlab/Simulink simulation model and experimental platform are established to verify the validity and practicality of the modulation strategy.

scholarly journals Modified Modulation Strategy of 1: 1: 2 Asymmetric Nine-Level Inverter and Its Power Balance Method

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 75
Author(s):  
Manyuan Ye ◽  
Qiwen Wei ◽  
Wei Ren ◽  
Guizhi Song
Keyword(s):  
Output Power ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Low Voltage ◽  
Balance Control ◽  
Power Balance ◽  
Switching Loss ◽  
Switching Losses ◽  
Hybrid Frequency

The three unit nine-level inverter can output more voltage levels with fewer h-bridge units, while having better output waveform quality. However, in the conventional hybrid frequency modulation strategy, only one low-voltage unit adopts pulse width modulation (PWM), which causes the problem of switching loss and uneven heat distribution between the two low-voltage units. At the same time, the output power of the conventional modulation strategy is unbalanced. Aiming to resolve the above problems, a modified hybrid modulation strategy and a power balance control method under the strategy is proposed in this paper. The modulation strategy achieves output power balance between the three units and an even distribution of switching losses between the two low voltage units while maintaining the same output power quality. Simulation and experimental results verify the feasibility of the modulation strategy.

New Selective Harmonic Elimination-Pulse-Width Modulation for Cascaded H-bridge Multilevel Inverters

2018 ◽  
Vol 19 (5) ◽  
Author(s):  
Piyush L. Kamani ◽  
Mahmadasraf A. Mulla
Keyword(s):  
Real Time ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Experimental Studies ◽  
Equal Area ◽  
Multilevel Inverters ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Selection Of

AbstractThis paper presents a univariate equation-based selective harmonic elimination-pulse-width modulation (USHE-PWM) method for cascaded H-bridge (CHB) multilevel inverters (MLIs). Using equal-area criteria, the selection of voltage rating of dc-links have been done. The output voltage is controlled by inserting switching notch at the centre of each level of output voltage. Instead of conventional transcendental SHE-PWM equations, all these calculations are accomplished using univariate equations. This simplifies the real-time implementation of the proposed method greatly, even for the MLI with a large number of levels. The USHE-PWM method can eliminate more harmonics compared with the conventional SHE-PWM methods. While controlling the output voltage, the harmonic pattern remains unaffected. The validity of the proposed method is confirmed by the simulation and experimental studies.

Investigation of Switching Sequences on a Generalized SVPWM Algorithm for Multilevel Inverters

2018 ◽  
Vol 28 (02) ◽  
pp. 1950036 ◽  
Author(s):  
B. Hemanth Kumar ◽  
Makarand M. Lokhande
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Switching Loss ◽  
Voltage Profile ◽  
Switching Sequence ◽  
Multilevel Inverters ◽  
Harmonic Content ◽  
Simulation Results ◽  
Text Location

This paper investigates the various switching sequences on a generalized 60[Formula: see text] distributed coordinate system-based space vector pulse width modulation (SVPWM) algorithm for multilevel inverters. The main focus of this work is to improve the inverter output voltage profile by taking advantage of the redundancy inverter switching states. With the help of SVPWM algorithm, the three nearest vectors have to find out the synthesis of the [Formula: see text] location and then by applying the various optimum switching sequences, the inverter produces less harmonic content in the output voltage compared to the conventional switching sequence. All the switching sequence designs are developed with the help of minimum change detector (MCD) by using switching redundancies in order to reduce inverter switching loss. Simulation results to analyze various sequences on the general SVPWM algorithm are presented in the seven-level cascaded H-bridge (CHB) inverter. To validate the results, hardware results are presented on the seven-level CHB inverter.

An LED Driver Based on MCU for LCD Backlight

2013 ◽  
Vol 765-767 ◽  
pp. 2464-2468
Author(s):  
Guang Hua Chen ◽  
Gui Zhi Sheng ◽  
Feng Jiao Wang ◽  
Wen Zhou ◽  
Bin Jie Xiao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Modulation Scheme ◽  
Step Size ◽  
Led Driver ◽  
Cost Performance ◽  
Measurement Results ◽  
Joint Frequency ◽  
Frequency Pulse

in order to provide LCD backlight with multiple strings of LEDs, an LED driver based on MCU is proposed in the paper. A PWM signal is generated by the Pulse Width Modulation (PWM) module on the MCU chip, which is used to drive a DC-DC boost converter for LED power. The voltage and current of the boost circuit, along with all the channels current of LED, are measured by the Analog Digital Converter (ADC) module on the MCU chip, which are used to adjust the voltage of the boost circuit and supply comprehensive protection for the LED driver. To minimize the step size of the output voltage, the joint frequency-pulse width modulation scheme is proposed to regulate the output voltage of the boost circuit to an ideal value in the range of error, which increases the efficiency of the power. The measurement results show that the LED driver is extremely efficient and steady. Most of the output voltage step size is about 0.1V, the maximum step size is less than 0.3V. The conversion efficiency of the DC-DC converter is up to 94%. Thus the LED driver not only meets the demand of the parameter of LED, but also has high cost performance.

Output Voltage Sampling Circuit for Discontinuous Conduction Mode Flyback Pulse-Width Modulation Controller

2016 ◽  
Vol 25 (11) ◽  
pp. 1650140 ◽  
Author(s):  
Ling-Feng Shi ◽  
Zhen-Bo Shi ◽  
Sen Chen ◽  
Jian-Hui Xun
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Discharge Time ◽  
Constant Output

Primary-side controlled pulse-width modulation (PWM) flyback converter has been widely used in low-power and low-voltage products for its simple structure and low cost. This paper presents a novel output voltage sampling circuit which considers the influence of the rectifier diode current on the output voltage sampling. The output voltage sampling circuit samples the output voltage at 85% of the secondary inductance discharge time [Formula: see text] of last cycle, which improves the accuracy of the output voltage sampling circuit. Besides, the circuit can also sample the secondary inductance discharge time [Formula: see text]. Finally, a chip has been fabricated in 0.6[Formula: see text][Formula: see text]m complementary metal-oxide semiconductor (CMOS) process, which is used in the presented output voltage sampling circuit in its internal circuit to simple output voltage and achieve constant output voltage.

Comparison of Multicarrier PWM Techniques for Cascaded H-Bridge Multilevel Inverter

2017 ◽  
Vol 8 (2) ◽  
pp. 861 ◽  
Author(s):  
Hashim Hasabelrasul ◽  
Xiangwu Yan
Keyword(s):  
High Power ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Power Level ◽  
Power Conversion ◽  
Multilevel Inverter ◽  
Multilevel Inverters ◽  
Simulation Results ◽  
Multicarrier Pwm

<p>One of the preferred choices of electronic power conversion for high power applications are multilevel inverters topologies finding increased attention in industry. Cascaded H-Bridge multilevel inverter is one of these topologies reaching the higher output voltage, power level and higher reliability due to its modular topology. Level Shifted Carrier Pulse Width Modulation (LSCPWM) and Phase Shifted Carrier Pulse Width Modulation are used generally for switching cascaded H-bridge (CHB) multilevel inverters. This paper compares LSCPWM and PSCPWM in terms of total harmonics distortion (THD) and output voltage among inverter cells. Simulation for 21-level CHB inverter is carried out in MATLAB/SIMULINK and simulation results are presented.</p>

scholarly journals Control Techniques for the Cascaded and Cross-switched Multilevel Inverter - A Comparison

2021 ◽  
Vol 309 ◽  
pp. 01120
Author(s):  
Sameera Shaik ◽  
Suresh Kumar Tummala ◽  
D Srinivasa Rao
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
Control Techniques ◽  
Harmonic Content ◽  
Sinusoidal Pulse Width Modulation ◽  
Injection Pulse

Nowadays, the multilevel inverter has gained huge attention and has become more popularized in high voltage and high-power applications with low harmonics. As the number of output voltage increases, the harmonic content of the output voltage waveform decreases. In this paper, a comparison of cascaded H-bridge and cross-switched multilevel inverters for 7, 9, 15, 21 levels will be carried out. The different control techniques that will be used for carrying out comparisons are space vector pulse width modulation (SPVPWM), sinusoidal pulse width modulation (SPWM), and third harmonic injection pulse width modulation (THI-PWM) respectively. Here, the seven-level inverter is discussed mainly and can be extended to any number of levels.

scholarly journals Three Phase Eleven Level Modular Multilevel Inverter with PD-PWM for Grid Connected System

2020 ◽  
pp. 86-91
Author(s):  
P Yogini Dr. Sujatha Balaraman,
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Utilization Factor ◽  
Multilevel Inverters ◽  
Three Phase ◽  
Conversion System ◽  
Effective Use

The prominence of Modular Multilevel Inverters (MMI) is rising owing their merits of simple mechanical construction and good voltage sharing for semiconductor devices. Mostly Multilevel Inverters use more than one source; however, the effective use of all the sources at all levels is rare. Conventional Multilevel Inverters will diminish the energy efficiency of the conversion system. When compared to conventional multilevel inverter, Modular Multilevel Inverter with a high numbers of voltage levels seem to be the most suitable because of the use of an isolated dc source. This paper explores a three-phase eleven level modular multilevel inverter with phase disposition pulse width modulation technique (PD-PWM) that can extract power from all the sources at all the levels. Besides, this paper develops a synchronous d-q reference frame controller to control the current of 11kV. When compared with Reduced Switch Count based Multilevel Inverter Series/Parallel switching topologies, the Modular Multilevel Inverter provides better Total Harmonic Distortion (THD) of output voltage and utilization factor.

scholarly journals THD Reduction in Multi-Level Inverters based on Multicarrier Pulse Width Modulation Technique

2020 ◽  
Vol 9 (4) ◽  
pp. 1970-1977
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Low Frequency ◽  
Voltage Source ◽  
Power Sources ◽  
Multilevel Inverters ◽  
Modulation Technique ◽  
Multicarrier Pwm ◽  
Frequency Pulse

t Due to the advent of technology, electronic equipments are much more sensitive to harmonic and its analysis play an important role whereby reducing the distortion due to harmonics needs attention. To meet the requirements of the industries, harmonic free-high rating power sources are in high demand. Total Harmonic Distortion (THD) is an indicator of AC voltage source quality. In case of inverters, one such way to reduce THD would be the use of Pulse Width Modulation (PWM). The existing methods mainly use the low frequency pulse width modulation techniques for the switching. Control methods employing high frequency switching techniques held in controlling THD with proper application of filters. This paper analyses THD in multilevel inverters using multicarrier PWM technique with five pulse width modulation technique through MATLAB simulations. Finally, a comparison is done to find the less harmonic generated PWM method using fewerfilters.

scholarly journals Experimental validation of new self-voltage balanced 9L-ANPC inverter for photovoltaic applications

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
M. Jagabar Sathik ◽  
Dhafer J. Almakhles ◽  
N. Sandeep ◽  
Marif Daula Siddique
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Superior Performance ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Switched Capacitor ◽  
Renewable Energy Resources ◽  
High Quality ◽  
Multilevel Inverters ◽  
Blocking Voltage

AbstractMultilevel inverters play an important role in extracting the power from renewable energy resources and delivering the output voltage with high quality to the load. This paper proposes a new single-stage switched capacitor nine-level inverter, which comprises an improved T-type inverter, auxiliary switch, and switched cell unit. The proposed topology effectively reduces the DC-link capacitor voltage and exhibits superior performance over recently switched-capacitor inverter topologies in terms of the number of power components and blocking voltage of the switches. A level-shifted multilevel pulse width modulation scheme with a modified triangular carrier wave is implemented to produce a high-quality stepped output voltage waveform with low switching frequency. The proposed nine-level inverter’s effectiveness, driven by the recommended modulation technique, is experimentally verified under varying load conditions. The power loss and efficiency for the proposed nine-level inverter are thoroughly discussed with different loads.

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