5 kV, 9.5 A SiC JBS Diodes with Non-Uniform Guard Ring Edge Termination for High Power Switching Application

2008 ◽  
Vol 600-603 ◽  
pp. 947-950 ◽  
Author(s):  
Jun Hu ◽  
Larry X. Li ◽  
Petre Alexandrov ◽  
Xiao Hui Wang ◽  
Jian Hui Zhao
Keyword(s):  
Energy Loss ◽  
High Power ◽  
Voltage Drop ◽  
Guard Ring ◽  
Power Switching ◽  
Edge Termination ◽  
Forward Current ◽  
Blocking Voltage ◽  
Bus Voltage ◽  
Ac Induction Motor

4H-SiC Junction Barrier Diodes (JBS) diodes were designed, fabricated and tested. The JBS diodes based on a 45μm thick, 1.4×1015cm-3 doped drift layer with multiple non-uniform spacing guard ring edge termination showed a blocking voltage of over 5kV. The 5kV JBS diode has a forward current density of 108A/cm2 at 3.5V and a specific on resistance (RSP_ON) of 25.2mW·cm2, which is very close to the theoretical RSP_ON of 23.3mΩ·cm2. DC I-V measurement of packaged JBS diodes showed a forward current of 100A at a voltage drop of 4.3V. A half-bridge inverter with a bus voltage up to 2.5kV was used to characterize the high power switching performance of SiC JBS diodes. A large inductance load of 1mH was used to simulate the load of a high power AC induction motor. Compared to a Si PIN diode module, the SiC JBS package reduces diode turn-off energy loss by 30% and Si IGBT turn-on energy loss by 21% at room temperature.

scholarly journals Wide-Range Prediction of Ultra-High Voltage SiC IGBT Static Performance Using Calibrated TCAD Model

2020 ◽  
Vol 1004 ◽  
pp. 911-916 ◽  
Author(s):  
Daniel Johannesson ◽  
Keijo Jacobs ◽  
Staffan Norrga ◽  
Anders Hallén ◽  
Muhammad Nawaz ◽  
...  
Keyword(s):  
High Voltage ◽  
High Power ◽  
Voltage Drop ◽  
Forward Voltage ◽  
Blocking Voltage ◽  
Wide Range ◽  
Forward Voltage Drop ◽  
Static Performance ◽  
Simulation Results ◽  
Ultra High Voltage

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general high-power application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

5.5 kV Bipolar Diodes From High Quality CVD 411-SiC

1998 ◽  
Vol 512 ◽  
Author(s):  
K. G. Irvine ◽  
R. Singh ◽  
M. J. Paisley ◽  
J. W. Palmour ◽  
O. Kordina ◽  
...  
Keyword(s):  
Thick Film ◽  
High Power ◽  
Growth Process ◽  
Carrier Lifetime ◽  
Voltage Drop ◽  
Power Devices ◽  
High Quality ◽  
Thickness Uniformity ◽  
Blocking Voltage ◽  
Reverse Blocking

ABSTRACTThick, high quality 4H-SiC material suitable for high power devices has been grown in a hot-wall reactor. Recent improvements to the growth process have improved our thickness uniformity over a 50mm wafer to less than 1% and the doping uniformity to less than 5%, both values expressed as σ/mean.A record breaking reverse blocking voltage of 5.5 kV was obtained on P-i-N diodes fabricated from a 85μm thick film. The on-state voltage drop was 5.4 V at 100 A/cm2. From this on-state voltage drop, the carrier lifetime was estimated in excess of 1μs.

27 kV, 20 A 4H-SiC n-IGBTs

2015 ◽  
Vol 821-823 ◽  
pp. 847-850 ◽  
Author(s):  
Edward van Brunt ◽  
Lin Cheng ◽  
Michael J. O'Loughlin ◽  
Jim Richmond ◽  
Vipindas Pala ◽  
...  
Keyword(s):  
Thermal Analysis ◽  
Carrier Lifetime ◽  
Device Fabrication ◽  
Gate Bias ◽  
Pulse Switching ◽  
Edge Termination ◽  
Forward Current ◽  
Photoconductivity Decay ◽  
Chip Size ◽  
Bus Voltage

In this work, we report our recently developed 27 kV, 20 A 4H-SiC n-IGBTs. Blocking voltages exceeding 24 kV were achieved by utilizing thick (210 μm and 230 μm), lightly doped N-drift layers with an appropriate edge termination. Prior to the device fabrication, an ambipolar carrier lifetime of greater than 10 μs was measured on both drift regions by the microwave photoconductivity decay (μPCD) technique. The SiC n-IGBTs exhibit an on-state voltage of 11.8 V at a forward current of 20 A and a gate bias of 20 V at 25 °C. The devices have a chip size of 0.81 cm2and an active conducting area of 0.28 cm2. Double-pulse switching measurements carried out at up to 16 kV and 20 A demonstrate the robust operation of the device under hard-switched conditions; coupled thermal analysis indicates that the devices can operate at a forward current of up to 10 A in a hard-switched environment at a frequency of more than 3 kHz and a bus voltage of 14 kV.

scholarly journals Planning models for optimal routing of radial distribution systems

2021 ◽  
Vol 10 (2) ◽  
pp. 108
Author(s):  
Mahmoud Ali Farrag ◽  
Maged Gamal Zahra ◽  
Shaimaa Omran
Keyword(s):  
Energy Loss ◽  
Radial Distribution ◽  
Distribution Systems ◽  
Voltage Drop ◽  
Optimal Routing ◽  
Linear Segment ◽  
Thermal Limit ◽  
Planning Models ◽  
Voltage Limit ◽  
Bus Voltage

<span>This paper presents three planning models for optimal routing of radial distribution systems. In the first two models, the cost function includes capital cost of lines, energy loss cost, and bays cost. The constraints equations include power balance equations, voltage drop equations, radiality equations, logic equations, thermal limit equations, and bus voltage limit equations. The first model considers the energy loss equation in its quadratic form while the second model approximates the energy loss equation of each cable size by a simple linear segment considering the economic loading of each cable size. In the third model, two sub-models are used where the first one gets the optimal radial network configuration regardless of the cable sizes and voltage constraints. In the second sub-model the best cable size on each selected line of the first model is determined to minimize the system costs while considering the bus voltage limit constraint and thermal limit constraint. Verification of the proposed planning models has been made using a real 11 kV 34-bus distribution network with 68 initial lines.</span>

1200-V, 50-A, Silicon Carbide Vertical Junction Field Effect Transistors for Power Switching Applications

2008 ◽  
Vol 600-603 ◽  
pp. 1047-1050 ◽  
Author(s):  
Victor Veliadis ◽  
Ty McNutt ◽  
Megan McCoy ◽  
Harold Hearne ◽  
Gregory De Salvo ◽  
...  
Keyword(s):  
Voltage Drop ◽  
Field Effect Transistors ◽  
Ring Structure ◽  
Avalanche Breakdown ◽  
Guard Ring ◽  
Gate Bias ◽  
Drain Voltage ◽  
Power Switching ◽  
Gate Current ◽  
Voltage Limit

High-voltage normally-on VJFETs of 0.19 cm2 and 0.096 cm2 areas were manufactured in seven photolithographic levels with no epitaxial regrowth and a single ion implantation event. A self aligned guard ring structure provided edge termination. At a gate bias of -36 V the 0.096 cm2 VJFET blocks 1980 V, which corresponds to 91% of the 12 μm drift layer’s avalanche breakdown voltage limit. It outputs 25 A at a forward drain voltage drop of 2 V (368 A/cm2, 735 W/cm2) and a gate current of 4 mA. The specific on-resistance is 5.4 mΩ cm2. The 0.19 cm2 VJFET blocks 1200 V at a gate bias of -26 V. It outputs 54 A at a forward drain voltage drop of 2 V (378 A/cm2, 755 W/cm2) and a gate current of 12 mA, with a specific on-resistance of 5.6 mΩ cm2. The VJFETs demonstrated low gate-to-source leakage currents with sharp onsets of avalanche breakdown.

Design, Fabrication and Characterization of a 4.5kV / 50A 4H-SiC PiN Rectifiers

2019 ◽  
Vol 954 ◽  
pp. 85-89
Author(s):  
Yue Wei Liu ◽  
Rui Xia Yang ◽  
Xiao Chuan Deng
Keyword(s):  
High Power ◽  
Room Temperature ◽  
Parallel Plane ◽  
Electrical Performance ◽  
Optimum Process ◽  
Forward Current ◽  
Blocking Voltage ◽  
Fabrication And Characterization ◽  
Numerical Device

In this work, a 4.5kV/50A 4H-SiC PiN rectifiers with mesa combined with double-JTE structures is successfully developed for high power applications. Two-dimension numerical device simulator Silvaco-TCAD is applied to optimizing the electrical performance of fabricated rectifiers. Mesa-combined double-JTE structure is utilized to achieve a high blocking voltage with a wider optimum process latitude. A forward current is 50 A at room temperature when SiC PiN device bias 4.1 V, while the maximum blocking voltage achieved is 4.7 kV, reaching up to 86% of parallel-plane junction bulk breakdown.

High-Voltage Large-Current 4H-SiC JBS Diodes

2015 ◽  
Vol 713-715 ◽  
pp. 1023-1026
Author(s):  
Yong Hong Tao ◽  
Song Bai ◽  
Run Hua Huang ◽  
Gang Chen ◽  
Ling Wang ◽  
...  
Keyword(s):  
High Voltage ◽  
Contact Area ◽  
Schottky Contact ◽  
Edge Termination ◽  
Forward Current ◽  
Large Current ◽  
Blocking Voltage

3.3kV and 4.5kV 4H-SiC junction barrier Schottky (JBS) diodes with floating guard rings edge termination have been fabricated. The 3.3kV device with 33μm 2.7E15 cm-3epilayer and 5.5Х5.5mm2schottky contact area has a blocking voltage (Vb) of 3.9 kV and a specificon-resistance (Ron) of 10.5 mΩ.cm2, with a forward current measured up to 50A at VF=3.0V. The 4.5kV device with 50 um 1.2E15 cm-3epilayer and 5.5Х5.5mm2schottky contact area has a blocking voltage (Vb) of 5.1 kV and a specificon-resistance (Ron) of 22.9 mΩ.cm2, with a forward current of 30A at VF=3.7V.

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