Barrier Inhomogeneities of Mo Schottky Barrier Diodes on 4H-SiC

2010 ◽  
Vol 645-648 ◽  
pp. 227-230
Author(s):  
Marco Naretto ◽  
Denis Perrone ◽  
Sergio Ferrero ◽  
Luciano Scaltrito
Keyword(s):  
Schottky Barrier ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Electrical Characterization ◽  
Current Theory ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Barrier Inhomogeneities

In this work we present the results of electrical characterization of 4H-SiC power Schottky diodes with a Mo metal barrier for high power applications. A comparison between different Schottky Barrier Height (SBH) evaluation methods (capacitance-voltage and current-voltage measurements), together with the comparison with other authors’ works, indicates that thermionic current theory is the dominant transport mechanism across the barrier from room temperature (RT) to 450K, while at T < 300K some anomalies in J-V curves appear and SBH and ideality factor significantly change their values. These deviations from ideality are attributed to Schottky barrier inhomogeneities. In particular, a model based on two SBHs seems appropriate to properly describe the electrical behavior of our devices.

scholarly journals Multi-Barrier Height Characterization and DLTS Study on Ti/W 4H-SiC Schottky Diode

2019 ◽  
Vol 963 ◽  
pp. 576-579
Author(s):  
Teng Zhang ◽  
Christophe Raynaud ◽  
Dominique Planson
Keyword(s):  
High Temperature ◽  
Barrier Height ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Metal Contact ◽  
High Temperature Annealing ◽  
Static Characteristics ◽  
Current Voltage ◽  
Capacitance Voltage

Schottky barrier height (SBH) has been characterized on 4H-SiC Schottky diodes with metal contact of Ti/W by Current-Voltage (I-V) and Capacitance-Voltage (C-V) measurements between 80 K and 400 K. Multi-barrier has been recognized and calculated according to different models. No clear difference has been found between single barrier diode and diode with multi-barrier from DLTS tests. Evolution on the I-V characteristics has been observed after high temperature annealing. The effect of annealing at room temperature (RT) and high temperature DLTS scan (stress under high temperature) have also been studied on both static characteristics and DLTS results.

Electrical Characterization of In Schottky Contacts to Epitaxial n-In0.46Ga0.54P Grown on n+-GaAs by Mocvd

1996 ◽  
Vol 448 ◽  
Author(s):  
N. Marcano ◽  
A. Singh
Keyword(s):  
Barrier Height ◽  
Thermionic Emission ◽  
Electrical Characterization ◽  
Interface Layer ◽  
Zero Bias ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Direct Current Voltage ◽  
Etched Surface

AbstractIn/n-In0.46Ga0.54P Schottky diode was fabricated by thermal evaporation of In on chemically etched surface of In0.45Ga0.54P:Si epitaxial layer grown on highly doped n type GaAs. The In metal formed a high quality rectifying contact to In0.46Ga0.54P:Si with a rectification ratio of 500. The direct current-voltage/temperature (I-V/T) characteristics were non-ideal with the values of the ideality factor (n) between 1.26-1.78 for 400>T>260 K. The forward I-V data strongly indicated that the current was controlled by the generation-recombination (GR) and thermionic emission (TE) mechanisms for temperature in the range 260-400 K. From the temperature variation of the TE reverse saturation current, the values of (0.75±0.05)V and the (4.5±0.5)×10-5 Acm-2K-2 for the zero bias zero temperature barrier height (φoo) and modified effective Richardson constant were obtained. The 1 MHz capacitance-voltage (C-V) data for 260 K < T < 400 K was analyzed in terms of the C-2-V relation including the effect of interface layer to obtain more realistic values of the barrier height (φbo). The temperature dependence of φbo was described the relation φbo =(0.86±10.03) - (8.4±0.7)×l0-4T. The values of φoo, obtained by the I-V and C-V techniques agreed well.

Impact of Interface Traps on Current-Voltage Characteristics of 4H-SiC Schottky-Barrier Diodes

2014 ◽  
Vol 778-780 ◽  
pp. 710-713 ◽  
Author(s):  
Hamid Amini Moghadam ◽  
Sima Dimitrijev ◽  
Ji Sheng Han
Keyword(s):  
Schottky Barrier ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Interface Traps ◽  
Barrier Heights ◽  
Current Voltage ◽  
Donor Type ◽  
Current Voltage Characteristics ◽  
Expected Values

This paper presents a physical model based on interface traps to explain both the larger barrier heights of practical Schottky diodes in comparison to the theoretically expected values and the appearance of a knee in the log I–V characteristics. According to this model, acceptor-type interface traps near the valance band increase the Schottky barrier height, which shifts the log I–V characteristic to higher forward-bias voltages. In addition to the acceptor traps, donor-type interface traps can appear near the conduction band, and when they do, they cause the knee in the log I–V characteristics as their energy level falls below the Fermi level and the charge associated with these traps changes from positive to neutral.

Characterization of SiC Implanted with B or Al Using Thermal Admittance Spectroscopy

2002 ◽  
Vol 719 ◽  
Author(s):  
S.R. Smith ◽  
M.A. Capano ◽  
A.O. Evwaraye
Keyword(s):  
Thermal Activation ◽  
Room Temperature ◽  
Schottky Diodes ◽  
Low Frequency ◽  
Energy Shift ◽  
Shallow Donor ◽  
Admittance Spectroscopy ◽  
Capacitance Voltage ◽  
Dopant Atoms

AbstractWe have measured the thermal activation energies of electrically active defects in 4H- and 6H-SiC implanted with either Al or B ions, using Thermal Admittance Spectroscopy. The net acceptor concentrations were monitored using room temperature low frequency Capacitance-Voltage measurements. The substrates were n/n+ epilayers. The implantations plus annealing produced p-type layers that were acceptable for characterization. The specimens were annealed in Ar at 1600 ° C, after which Ni Schottky diodes were fabricated on the specimens. Annealing times were 5, 15, 30, and 60 min. In some of the specimens, a shallow level was found that did not correspond to known levels. As the annealing progressed, energy shifts were noted for some of the detected levels. In some specimens, the implanted p-type impurity and the n-type residual dopants in the substrate were simultaneously detected. Measurements of electrically active ptype species were compared to “control” specimens implanted with Ar. From this comparison, we conclude that at least one shallow donor level is introduced into the bandgap by the implantation process, and is not annealed out. The defects associated with the implantation may affect actual device performance of diodes by destabilizing the lattice occupation of the implanted dopant atoms (energy shift with annealing), and act as lifetime killers.

Structural and Electrical Characterization of TiB2/TiSi2 Bilayer Barrier Structure

1996 ◽  
Vol 441 ◽  
Author(s):  
G. Sade ◽  
J. Pelleg ◽  
A. Grisaru
Keyword(s):  
Diffusion Barrier ◽  
Vacuum Annealing ◽  
Schottky Diodes ◽  
Electrical Characterization ◽  
X Ray Diffraction ◽  
Cross Sectional ◽  
X Ray ◽  
Current Voltage ◽  
Thermal Stability Of

AbstractThe TiB2/TiSi2 bilayer is considered as a diffusion barrier in metallization system with Cu. The TiSi2 sublayer serves as a contact and also as an additional diffusion barrier against boron, which outdiffuses from TiB2 at high temperature annealing. The attempts to form TiSi2 by vacuum annealing of TiB2/Ti film, which was obtained by co-sputtering from elemental targets are described. The composition and the structure of the films were analyzed by Auger electron spectroscopy (AES), X-ray diffraction (XRD) and high-resolution cross-sectional TEM (HRXTEM). The Cu/TiB2/(Ti-Si)/n-Si contacts were investigated using current-voltage (I–V) on Schottky diode structures, which were prepared on n-type Si (100). The thermal stability of the TiB2/(Ti-Si) barrier was studied by structural and electrical analysis.It was observed that the lowest sheet resistance of 5.1 Ω/‪ was obtained after 850 °C annealing for 30 min, however the resulting Ti-Si layer is practically still amorphous and contains only a very small fraction of C54 TiSis in the form of microcrystallites. This layer also contained Ti5Si3 as indicated by XRD. The barrier height of Cu/TiB2/(Ti-Si)/n-Si Schottky diodes is ˜0.6 V and it does not show significant changes in the range 400–700 °C. Electrical monitoring is a very effective tool to detect deterioration of the barrier. No penetration is observed by AES at 700 °C, while the I–V curve shows changes in properties.

Effect of Indentation on I-V Characteristics of Au/n-GaAs Schottky Barrier Diodes

2008 ◽  
Vol 63 (3-4) ◽  
pp. 199-202 ◽  
Author(s):  
Ahmet Faruk Ozdemir ◽  
Adnan Calik ◽  
Guven Cankaya ◽  
Osman Sahin ◽  
Nazim Ucar
Keyword(s):  
Schottky Barrier ◽  
Barrier Height ◽  
Schottky Diode ◽  
Ideality Factor ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
Vickers Microhardness ◽  
Schottky Barrier Diodes ◽  
Microhardness Test ◽  
Current Voltage

Au/n-GaAs Schottky barrier diodes (SBDs) have been fabricated. The effect of indentation on Schottky diode parameters such as Schottky barrier height (φb) and ideality factor (n) was studied by current-voltage (I-V) measurements. The method used for indentation was the Vickers microhardness test at room temperature. The experimental results showed that the I-V characteristics move to lower currents due to an increase of φb with increasing indentation weight, while contacts showed a nonideal diode behaviour.

scholarly journals Characterization of Schottky Diodes on 4H-SiC with Various Off-Axis Angles Grown by Sublimation Epitaxy

2008 ◽  
Vol 600-603 ◽  
pp. 967-970 ◽  
Author(s):  
Mitsutaka Nakamura ◽  
Yoshikazu Hashino ◽  
Tomoaki Furusho ◽  
Hiroyuki Kinoshita ◽  
Hiromu Shiomi ◽  
...  
Keyword(s):  
Ideality Factor ◽  
Basal Plane ◽  
Reverse Bias ◽  
Schottky Barrier Height ◽  
Schottky Diodes ◽  
Bias Current ◽  
Device Performance ◽  
Current Voltage ◽  
Current Voltage Characteristics

The effects of basal-plane defects on the performance of 4H-SiC Schottky diodes using a Ni electrode are demonstrated. Systematic characterization was performed using 4H-SiC epitaxial layers grown by sublimation epitaxy on substrates with various off-axis angles. As the off-axis angle increases, the ideality factor of the current-voltage characteristics increases, and the Schottky barrier height decreases, corresponding to an increase in the number of basal-plane defects. The reverse-bias current degrades for high off-axis samples. These results indicate that basal-plane defects degrade the device performance. Schottky diodes that possesses good characteristics were obtained for samples with low off-axis angles (2o- and 4o-off samples).

Probing at Nanoscale Underneath the Gate Oxides in 4H-SiC MOS-Based Devices Annealed in N2O and POCl3

2014 ◽  
Vol 806 ◽  
pp. 143-147
Author(s):  
P. Fiorenza ◽  
Marilena Vivona ◽  
L.K. Swanson ◽  
Filippo Giannazzo ◽  
C. Bongiorno ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Cross Sectional ◽  
Direct Demonstration ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
N Incorporation ◽  
The Impact ◽  
Post Deposition ◽  
Partial Compensation

In this paper a comparative study of the impact of N2O and POCl3 annealing on the SiO2/SiC system is presented, combining nanoscale electrical characterization of SiC surface doping by scanning spreading resistance microscopy (SSRM) and scanning capacitance microscopy (SCM) to the conventional capacitance-voltage (C-V) and current-voltage (I-V) measurements on MOS-based devices. A significant reduction of the interface states density (from 1.8×1012 to 5.7×1011 cm-2eV-1) and, correspondingly, an increase in the carrier mobility (from 19 to 108 cm2V-1s-1) was found moving from N2O to POCl3 annealing. Furthermore, SSRM measurements on bare p+-type SiC regions selectively exposed to N2O and POCl3 at high temperature provided the direct demonstration of the incorporation of N or P-related donors in the SiC surface, leading to a partial compensation of substrate acceptors during N2O treatment and to an overcompensation during POCl3 annealing. Finally, cross-sectional SCM profiles performed on epitaxial n-doped 4H-SiC with 45 nm SiO2 (subjected to post deposition annealing in the two ambients) allowed to quantify the active donors concentrations associated to P or N incorporation under the gate oxide, showing almost a factor of ten higher doping (4.5×1018cm-3 vs 5×1017cm-3) in the case of P related donors.

Barrier Inhomogeneities of a Medium Size Mo/4H-SiC Schottky Diode

2012 ◽  
Vol 711 ◽  
pp. 188-192
Author(s):  
Muhammad Yousuf Zaman ◽  
Denis Perrone ◽  
Sergio Ferrero ◽  
Luciano Scaltrito ◽  
Marco Naretto
Keyword(s):  
Schottky Barrier ◽  
Schottky Diode ◽  
Schottky Diodes ◽  
Schottky Contact ◽  
Effective Area ◽  
Medium Size ◽  
Current Voltage ◽  
Significant Difference ◽  
Barrier Inhomogeneities ◽  
Current Voltage Characteristics

Forward current-voltage characteristics of a medium sized (3.05mm2)Mo/4H-SiC (molyb-denum on silicon carbide) Schottky diode|fabricated for high power applications | are analysedwithin a temperature range of 125-450 K. Accurate theoretical modeling is carried out using Tung'smodel in which it is considered that numerous low barrier nanometer size patches, present in uniformhigh barrier, are responsible for the inhomogeneities in the Schottky barrier of SiC-based electronicdevices. A significant difference is observed between the effective area involved in the current trans-port and the geometric area of the Schottky contact along with a dependence of the ideality factor andhe barrier height on temperature. The obtained values of uniform Schottky barrier and Richardson'sconstant are seen to be in accordance with previous works. It is concluded that the above mentionedmodel can be used to describe the electrical behaviour of Mo/4H-SiC Schottky diodes.

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