Flatband Voltage Shift Depending on SiO2/SiC Interface Charges in 4H-SiC MOS Capacitors with AlON/SiO2 Stacked Gate Dielectrics

2016 ◽  
Vol 858 ◽  
pp. 681-684 ◽  
Author(s):  
Takuji Hosoi ◽  
Shuji Azumo ◽  
Kenji Yamamoto ◽  
Masatoshi Aketa ◽  
Yusaku Kashiwagi ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Aluminum Oxynitride ◽  
Equivalent Thickness ◽  
Mos Capacitors ◽  
Voltage Shift ◽  
Interface Charges ◽  
Linear Fit ◽  
Flatband Voltage

The mechanism of flatband voltage shift in SiC metal-oxide-semiconductor (MOS) capacitors with stacked gate dielectrics consisting of aluminum oxynitride (AlON) layers and SiO2 underlayers was investigated by varying the AlON and SiO2 thicknesses. The flatband voltages of the fabricated capacitors with fixed SiO2 underlayer thicknesses were almost independent of the AlON thickness, indicating the negligible charges in AlON layer. On the other hand, when varying SiO2 underlayer thickness, the flatband voltage decreased with an increase in capacitance equivalent thickness (CET), and the slope of their linear fit was comparable to that for SiC MOS capacitors without AlON layer. These observations can be well explained by assuming interface charges at AlON/SiO2 interface with an amount comparable, but a polarity opposite to, those at SiO2/SiC interface.

On Separating Oxide Charges and Interface Charges in 4H-SiC Metal-Oxide-Semiconductor Devices

2006 ◽  
Vol 527-529 ◽  
pp. 1007-1010 ◽  
Author(s):  
Daniel B. Habersat ◽  
Aivars J. Lelis ◽  
G. Lopez ◽  
J.M. McGarrity ◽  
F. Barry McLean
Keyword(s):  
Room Temperature ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Interface Charges ◽  
Flatband Voltage ◽  
Oxide Traps ◽  
P Type

We have investigated the distribution of oxide traps and interface traps in 4H Silicon Carbide MOS devices. The density of interface traps, Dit, was characterized using standard C-V techniques on capacitors and charge pumping on MOSFETs. The number of oxide traps, NOT, was then calculated by measuring the flatband voltage VFB in p-type MOS capacitors. The amount that the measured flatband voltage shifts from ideal, minus the contributions due to the number of filled interface traps Nit, gives an estimate for the number of oxide charges present. We found Dit to be in the low 1011cm−2eV−1 range in midgap and approaching 1012 −1013cm−2eV−1 near the band edges. This corresponds to an Nit of roughly 2.5 ⋅1011cm−2 for a typical capacitor in flatband at room temperature. This data combined with measurements of VFB indicates the presence of roughly 1.3 ⋅1012cm−2 positive NOT charges in the oxide near the interface for our samples.

scholarly journals Origin of flatband voltage shift and unusual minority carrier generation in thermally grown GeO2/Ge metal-oxide-semiconductor devices

2009 ◽  
Vol 94 (20) ◽  
pp. 202112 ◽  
Author(s):  
Takuji Hosoi ◽  
Katsuhiro Kutsuki ◽  
Gaku Okamoto ◽  
Marina Saito ◽  
Takayoshi Shimura ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Minority Carrier ◽  
Semiconductor Devices ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Carrier Generation ◽  
Voltage Shift ◽  
Flatband Voltage ◽  
Thermally Grown

Effect of Increased Oxide Hole Trap Density due to Nitrogen Incorporation at the SiO2/SiC Interface on F-N Current Degradation

2011 ◽  
Vol 679-680 ◽  
pp. 382-385 ◽  
Author(s):  
Christian Strenger ◽  
Anton J. Bauer ◽  
Heiner Ryssel
Keyword(s):  
Silicon Carbide ◽  
Silicon Dioxide ◽  
Gate Dielectrics ◽  
Charge Trapping ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Hole Trap ◽  
Mos Capacitors ◽  
Nitrogen Incorporation ◽  
Oxide Trapped Charge

Metal-oxide-semiconductor (MOS) capacitors were formed on 4H-silicon carbide (SiC) using thermally grown silicon dioxide (SiO2) as gate dielectrics, both with and without nitrogen incorporation within the oxide. The field dependence of the charge trapping properties of these structures was analyzed and linked to the observed Fowler-Nordheim current degradation. Furthermore, first considerations were presented that indicate an electron impact emission induced generation of positive oxide trapped charge.

Oxide Charging Effects by PH3/He Ion Shower Doping

2000 ◽  
Vol 621 ◽  
Author(s):  
Cheon-Hong Kim ◽  
Juhn-Suk Yoo ◽  
Kee-Chan Park ◽  
Min-Koo Han
Keyword(s):  
Metal Oxide ◽  
Thermal Annealing ◽  
Oxide Films ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Voltage Shift ◽  
Mos Structure

ABSTRACTWe report the oxide charging effects on metal oxide semiconductor (MOS) structure caused by PH3/He ion shower doping. The parallel negative shift of flat-band voltage occurred for the ion-doped PETEOS samples even after thermal annealing. When the ion dose was higher, this shift was larger. These results show that a considerable amount of positive charges were induced inside the oxide films after PH3/He ion shower doping process. For the same ion dose, the flat-band voltage shift is larger when the thickness of PETEOS is thicker. When the ion dose was 1.5×1017cm−2 and the thickness of PETEOS was 80nm, the shift of flat-band voltage was larger than −7V. We can conclude that PH3/He ion shower doping process induces the positive charges, which result in the flat band voltage shift of MOS capacitors, in the bulk oxide films when oxide films are exposed to ion shower doping.

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