Analysis of Interface Trap Density and Channel Mobility in 4H-SiC NMOS Capacitors and Lateral MOSFETs

2017 ◽  
Vol 897 ◽  
pp. 115-118
Author(s):  
Martin Domeij ◽  
Jimmy Franchi ◽  
Krister Gumaelius ◽  
K. Lee ◽  
Fredrik Allerstam
Keyword(s):  
Threshold Voltage ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Subthreshold Slope ◽  
Gate Oxides ◽  
Channel Mobility

Lateral implanted SiC MOSFETs and NMOS capacitors were fabricated and used to extract channel mobility and interface state density DIT for three different gate oxides. DIT values were extracted using the high(1 MHz)-low(1 kHz) method for NMOS capacitors and the subthreshold slope for MOSFETs. The subthreshold slope extraction gave 6-20 times higher DIT values compared to the high-low method, presumably because the high-low method cannot capture the fastest traps [1]. None of the methods resulted in clear proportionality between the inverse channel mobility and DIT. The subthreshold slope gave similar DIT values for samples with different surface p-doping concentrations indicating that the method is not sensitive to the threshold voltage.

High Channel Mobility in P-Channel MOSFETs Fabricated on 4H-SiC (0001) and Non-Basal Faces

2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Thermal Oxidation ◽  
Interface State ◽  
Original Method ◽  
State Density ◽  
Interface State Density ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Mos Devices

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.

High Temperature Nitridation of 4H-SiC MOSFETs

2016 ◽  
Vol 858 ◽  
pp. 623-626 ◽  
Author(s):  
Hua Rong ◽  
Yogesh K. Sharma ◽  
Tian Xiang Dai ◽  
Fan Li ◽  
M.R. Jennings ◽  
...  
Keyword(s):  
High Temperature ◽  
Threshold Voltage ◽  
Field Effect ◽  
Annealing Process ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Gate Oxides ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Lower Temperature

This paper presents and analyse the experimental results of 4H-SiC(0001) lateral MOSFETs and MOS capacitors with gate oxides grown directly in N2O environment or in O2 ambient followed by a N2O post oxidation annealing process. Different nitridation temperatures of 1200°C, 1300°C, 1400°C and 1500°C have been investigated. Results have demonstrated that at high temperature (>1200°C) there is a significant improvement in the interface trap density (~1.5×1011 cm-2eV-1 at 0.2 eV) and field effect channel mobility (19 cm2/V.s) of 4H-SiC MOSFET compare with those at lower temperature (1×1012 cm-2eV-1 at 0.2 eV and 4 cm2/V.s). Among those nitridation temperatures, 1300°C has found to be the most effective in increasing the field effect channel mobility and reducing threshold voltage.

Accurate Characterization of Interface State Density of SiC MOS Structures and the Impacts on Channel Mobility

2014 ◽  
Vol 778-780 ◽  
pp. 418-423 ◽  
Author(s):  
Hironori Yoshioka ◽  
Takashi Nakamura ◽  
Junji Senzaki ◽  
Atsushi Shimozato ◽  
Yasunori Tanaka ◽  
...  
Keyword(s):  
Interface State ◽  
Interface States ◽  
State Density ◽  
Interface State Density ◽  
Subthreshold Slope ◽  
Field Effect Mobility ◽  
Channel Mobility ◽  
The Common ◽  
Mos Structures

We focused on the inability of the common high-low method to detect very fast interface states, and developed methods to evaluate such states (CψS method). We have investigated correlation between the interface state density (DIT) evaluated by the CψS method and MOSFET performance, and found that the DIT(CψS) was well reflected in MOSFET performance. Very fast interface states which are generated by nitridation restricted the improvement of subthreshold slope and field-effect mobility.

Degradation in Oxide Reliability Due to the Presence of Nitrogen in the Oxidation Ambient

1993 ◽  
Vol 318 ◽  
Author(s):  
Greg A. Hames ◽  
J. J. Wortman ◽  
S. E. Beck ◽  
B. J. Shemanski
Keyword(s):  
Photoelectron Spectroscopy ◽  
Current Drive ◽  
Trap Density ◽  
Oxide Semiconductor ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Subthreshold Slope ◽  
Channel Mobility ◽  
Nitrogen Incorporation ◽  
Slope Channel

ABSTRACTUltrathin rapid thermal oxides have been formed in oxygen with varying levels of nitrogen incorporated into the oxidation ambient. Metal-oxide-semiconductor capacitors and MOSFET devices were subsequently fabricated and tested. Device reliability was degraded by the addition of nitrogen into the oxidation ambient. Time-independent catastrophic breakdown measurements showed a large increase in the number of extrinsic breakdowns in devices formed in higher levels of nitrogen. Device performance was measured by interface trap density, subthreshold slope, channel mobility and threshold voltage. A small increase in the interface trap density was observed for increasing levels of nitrogen in the oxidation ambient. However, no trends were observed for MOSFET devices in terms of subthreshold slope, channel mobility or current drive. No improvement in the interface state generation rate due to nitrogen incorporation in the oxidation ambient was observed in this study. X-ray photoelectron spectroscopy detected no nitrogen in the oxides indicating less than 1% nitrogen incorporation.

scholarly journals Inversion channel mobility and interface state density of diamond MOSFET using N-type body with various phosphorus concentrations

2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Inversion Channel

Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Gate Oxide ◽  
Interface State ◽  
Channel Length ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Threshold Voltages

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing

2006 ◽  
Vol 527-529 ◽  
pp. 987-990 ◽  
Author(s):  
Tsunenobu Kimoto ◽  
H. Kawano ◽  
Masato Noborio ◽  
Jun Suda ◽  
Hiroyuki Matsunami
Keyword(s):  
Breakdown Strength ◽  
Oxide Thickness ◽  
Interface State ◽  
State Density ◽  
Interface Properties ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Oxide Deposition ◽  
Mos Structures

Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 mcm2, which is one of the best performances among lateral SiC MOSFETs reported.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

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