Ultra Wideband RF Transceiver Design in CMOS Technology

AbstractThis paper presents a threshold decision circuit with an adjustable detection window designed in a 90-nm IBM CMOS technology. Together with an RF mixer, the decision Section realizes the circuit implementation of the back-end of a transmitted reference ultra wideband receiver, which is yet to be reported in literature. The proposed circuit is built on a differential amplifier core and avoids the use of integrator and sampling blocks, which reduces the device burden necessary for the architecture. Moreover, the detection window threshold of the design can be regulated by three independent factors defined by the circuit elements. The circuit is tested at an input data rate of 0.1∼2.0 Gbps and the core decision section consumes 9.14 mW from a 1.2-V bias supply (with a maximum capacity/Pdc ratio of 218.8 GHz/W). When compared against other reported decision blocks, the proposed detection circuit shows improved performance in terms of capacity and power requirement.

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A 0.18um CMOS Low Noise Amplifier for 3-5ghz UWB Receivers

International Journal of Engineering & Technology ◽

10.14419/ijet.v7i3.6.14944 ◽

2018 ◽

Vol 7 (3.6) ◽

pp. 84

Author(s):

N Malika Begum ◽

W Yasmeen

Keyword(s):

Power Supply ◽

Noise Figure ◽

Cmos Technology ◽

Low Noise ◽

Low Noise Amplifier ◽

Ultra Wideband ◽

Noise Amplifier ◽

5 Ghz ◽

Chebyshev Filter ◽

Minimum Noise

This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.

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CMOS Ultra-Wideband Low Noise Amplifier Design

International Journal of Microwave Science and Technology ◽

10.1155/2013/328406 ◽

2013 ◽

Vol 2013 ◽

pp. 1-6 ◽

Cited By ~ 10

Author(s):

K. Yousef ◽

H. Jia ◽

R. Pokharel ◽

A. Allam ◽

M. Ragab ◽

...

Keyword(s):

Impedance Matching ◽

Cmos Technology ◽

Low Noise ◽

Low Noise Amplifier ◽

Ultra Wideband ◽

Output Impedance ◽

Integrated Inductor ◽

Technology Process ◽

Amplifier Design ◽

Noise Amplifier

This paper presents the design of ultra-wideband low noise amplifier (UWB LNA). The proposed UWB LNA whose bandwidth extends from 2.5 GHz to 16 GHz is designed using a symmetric 3D RF integrated inductor. This UWB LNA has a gain of 11 ± 1.0 dB and a NF less than 3.3 dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8 V supply. The UWB LNA is designed and simulated in standard TSMC 0.18 µm CMOS technology process.

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A high gain down-conversion mixer in 0.18um CMOS technology for ultra wideband applications

2016 3rd International Conference on Signal Processing and Integrated Networks (SPIN) ◽

10.1109/spin.2016.7566764 ◽

2016 ◽

Cited By ~ 1

Author(s):

Uttam Kumar Sharma ◽

Abhay Chaturvedi ◽

Manish Kumar

Keyword(s):

Cmos Technology ◽

High Gain ◽

Ultra Wideband ◽

Down Conversion

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A Novel Reconfigurable MB-OFDM UWB LNA Using Programmable Current Reuse

International Journal of Microwave Science and Technology ◽

10.1155/2013/924161 ◽

2013 ◽

Vol 2013 ◽

pp. 1-5 ◽

Cited By ~ 4

Author(s):

Ahmed Ragheb ◽

Ghazal Fahmy ◽

Iman Ashour ◽

Abdel Hady Ammar

Keyword(s):

Orthogonal Frequency Division Multiplexing ◽

Cmos Technology ◽

Low Noise ◽

Ultra Wideband ◽

Current Reuse ◽

Input Matching ◽

Common Gate ◽

Programmable Circuit ◽

Noise Amplifier ◽

Mode 3

This paper presents a design of a reconfigurable low noise amplifier (LNA) for multiband orthogonal frequency division multiplexing (MB-OFDM) ultra wideband (UWB) receivers. The proposed design is divided into three stages; the first one is a common gate (CG) topology to provide the input matching over a wideband. The second stage is a programmable circuit to control the mode of operation. The third stage is a current reuse topology to improve the gain, flatness and consume lower power. The proposed LNA is designed using 0.18 μm CMOS technology. This LNA has been designed to operate in two subbands of MB-OFDM UWB, UWB mode-1 and mode-3, as a single or concurrent mode. The simulation results exhibit the power gain up to 17.35, 18, and 11 dB for mode-1, mode-3, and concurrent mode, respectively. The NF is 3.5, 3.9, and 6.5 and the input return loss is better than −12, −13.57, and −11 dB over mode-1, mode-3, and concurrent mode, respectively. This design consumes 4 mW supplied from 1.2 V.

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