scholarly journals Design of an Efficient Current Mode Full-Adder Applying Carbon Nanotube Technology

2018 ◽  
Vol 10 (4) ◽  
pp. 43-50 ◽  
Author(s):  
Parisa Nejadzadeh ◽  
◽  
Mohammad Reza Reshadinezhad
Keyword(s):  
Carbon Nanotube ◽  
Current Mode ◽  
Full Adder ◽  
Carbon Nanotube Technology

scholarly journals A low-voltage and energy-efficient full adder cell based on carbon nanotube technology

2010 ◽  
Vol 2 (2) ◽  
pp. 114-120 ◽  
Author(s):  
Keivan Navi ◽  
Rabe’e Sharifi Rad ◽  
Mohammad Hossein Moaiyeri ◽  
Amir Momeni
Keyword(s):  
Carbon Nanotube ◽  
Energy Efficient ◽  
Low Voltage ◽  
Full Adder ◽  
Carbon Nanotube Technology

scholarly journals Designing High-Speed, Low-Power Full Adder Cells Based on Carbon Nanotube Technology

2014 ◽  
Vol 5 (5) ◽  
pp. 31-43 ◽  
Author(s):  
Mehdi Masoudi ◽  
Milad Mazaheri ◽  
Aliakbar Rezaei ◽  
Keivan Navi
Keyword(s):  
Carbon Nanotube ◽  
Low Power ◽  
High Speed ◽  
Full Adder ◽  
Carbon Nanotube Technology

scholarly journals Design and Analysis of a New Carbon Nanotube Full Adder Cell

2011 ◽  
Vol 2011 ◽  
pp. 1-6 ◽  
Author(s):  
M. H. Ghadiry ◽  
Asrulnizam Abd Manaf ◽  
M. T. Ahmadi ◽  
Hatef Sadeghi ◽  
M. Nadi Senejani
Keyword(s):  
Carbon Nanotube ◽  
High Performance ◽  
Full Adder ◽  
Cmos Technology ◽  
Ultra Low Power ◽  
And Performance ◽  
Carbon Nanotube Technology ◽  
Power Delay Product ◽  
Full Swing ◽  
Very High

A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the presented full adder cell. A new method is used in order to design a full-swing full adder cell with low number of transistors. The proposed full adder is implemented in MOSFET-like carbon nanotube technology and the layout is provided based on standard 32 nm technology from MOSIS. The simulation results using HSPICE show that there are substantial improvements in both power and performance of the proposed circuit compared to the latest designs. In addition, the proposed circuit has been implemented in conventional 32 nm process to compare the benefits of using MOSFET-like carbon nanotubes in arithmetic circuits over conventional CMOS technology. The proposed circuit can be applied in very high performance and ultra-low-power applications.

High-energy, rechargeable Li-ion battery based on carbon nanotube technology

2004 ◽  
Vol 138 (1-2) ◽  
pp. 277-280 ◽  
Author(s):  
R.Scott Morris ◽  
Brian G. Dixon ◽  
Thomas Gennett ◽  
Ryne Raffaelle ◽  
Michael J. Heben
Keyword(s):  
Carbon Nanotube ◽  
High Energy ◽  
Li Ion Battery ◽  
Li Ion ◽  
Carbon Nanotube Technology

scholarly journals 14 Transistors CNTFET and CMOS Full Adder Cell for Modified GDI Technique

2019 ◽  
Vol 8 (12) ◽  
pp. 842-845
Keyword(s):  
Carbon Nanotube ◽  
High Speed ◽  
Full Adder ◽  
Cmos Technology ◽  
Digital Circuit ◽  
Basic Unit ◽  
Short Channel ◽  
Low Power Dissipation ◽  
The Difference ◽  
Cmos Implementation

Adder Is Basic Unit For Any Digital System, Dsp And Microprocessor. The Main Issue In Design High Speed Full Adder Cell With The Low Power Dissipation. As We Know Cmos Technology Used For Vlsi Designing Cmos Has Many Drawbacks As High Power Short Channel Effect Etc. Then Cntfet (Carbon Nanotube Field Effect Transistor) Has Been Developed Which Has Same Structure As Cmos. The Difference Between Structure Of Cmos And Cntfet Is Their Channel. In Cntfet Channel Is Replaced By Carbon Nanotube. In This Paper We Compare Full Adder Circuit Using Cntfet With Gdi Technique And Cmos Implementation Of Adder Which Gdi Technique. Gdi Technique Is Used For Speed And Power Optimization In Digital Circuit. This Can Also Reduce The Count Of Transistor Which Affects The Size Of Device.

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